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/openbmc/u-boot/arch/arm/dts/
H A Dexynos4210.dtsi2 * Samsung's Exynos4210 SoC device tree source
9 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
14 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
23 #include "exynos4210-pinctrl.dtsi"
24 #include "exynos4210-pinctrl-uboot.dtsi"
27 compatible = "samsung,exynos4210";
36 compatible = "samsung,exynos4210-pd";
45 compatible = "samsung,exynos4210-mct";
66 compatible = "samsung,exynos4210-clock";
78 compatible = "samsung,exynos4210-pinctrl";
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H A Dexynos4210-origen.dts3 * Samsung's Exynos4210 based Origen board device tree source
11 #include "exynos4210.dtsi"
14 model = "Insignal Origen evaluation board based on Exynos4210";
15 compatible = "insignal,origen", "samsung,exynos4210";
H A Dexynos4210-smdkv310.dts3 * Samsung's Exynos4210-based SMDKV310 board device tree source
12 model = "Samsung SMDKV310 on Exynos4210";
13 compatible = "samsung,smdkv310", "samsung,exynos4210";
H A Dexynos4.dtsi24 compatible = "samsung,exynos4210-combiner";
39 compatible = "samsung,exynos4210-uart";
45 compatible = "samsung,exynos4210-uart";
51 compatible = "samsung,exynos4210-uart";
57 compatible = "samsung,exynos4210-uart";
63 compatible = "samsung,exynos4210-uart";
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4.dtsi67 compatible = "samsung,exynos4210-audss-clock";
94 compatible = "samsung,exynos4210-chipid";
104 compatible = "samsung,exynos4210-srom";
109 compatible = "samsung,exynos4210-pd";
116 compatible = "samsung,exynos4210-pd";
123 compatible = "samsung,exynos4210-pd";
130 compatible = "samsung,exynos4210-pd";
138 compatible = "samsung,exynos4210-pd";
145 compatible = "samsung,exynos4210-pd";
152 compatible = "samsung,exynos4210-pd";
[all …]
H A Dexynos4210.dtsi3 * Samsung's Exynos4210 SoC device tree source
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
23 compatible = "samsung,exynos4210", "samsung,exynos4";
255 compatible = "samsung,exynos4210-sysram";
260 compatible = "samsung,exynos4210-sysram-ns";
266 compatible = "samsung,exynos4210-pd";
284 compatible = "samsung,exynos4210-mct";
305 compatible = "samsung,exynos4210-clock";
311 compatible = "samsung,exynos4210-pinctrl";
[all …]
H A DMakefile7 exynos4210-i9100.dtb \
8 exynos4210-origen.dtb \
9 exynos4210-smdkv310.dtb \
10 exynos4210-trats.dtb \
11 exynos4210-universal_c210.dtb \
H A Dexynos5.dtsi39 compatible = "samsung,exynos4210-chipid";
44 compatible = "samsung,exynos4210-srom";
49 compatible = "samsung,exynos4210-combiner";
106 compatible = "samsung,exynos4210-uart";
112 compatible = "samsung,exynos4210-uart";
118 compatible = "samsung,exynos4210-uart";
124 compatible = "samsung,exynos4210-uart";
170 compatible = "samsung,exynos4210-pwm";
208 compatible = "samsung,exynos4210-secss";
H A Dexynos3250.dtsi325 compatible = "samsung,exynos4210-sysram";
330 compatible = "samsung,exynos4210-sysram-ns";
336 compatible = "samsung,exynos4210-chipid";
362 compatible = "samsung,exynos4210-pd";
369 compatible = "samsung,exynos4210-pd";
376 compatible = "samsung,exynos4210-pd";
383 compatible = "samsung,exynos4210-pd";
390 compatible = "samsung,exynos4210-pd";
445 "samsung,exynos4210-mct";
465 compatible = "samsung,exynos4210-wakeup-eint";
[all …]
H A Dexynos4210-smdkv310.dts3 * Samsung's Exynos4210 based SMDKV310 board device tree source
11 * Samsung's Exynos4210 SoC.
15 #include "exynos4210.dtsi"
20 model = "Samsung smdkv310 evaluation board based on Exynos4210";
21 compatible = "samsung,smdkv310", "samsung,exynos4210", "samsung,exynos4";
H A Dexynos54xx.dtsi66 compatible = "samsung,exynos4210-sysram";
71 compatible = "samsung,exynos4210-sysram-ns";
78 "samsung,exynos4210-mct";
189 compatible = "samsung,exynos4210-ehci";
197 compatible = "samsung,exynos4210-ohci";
/openbmc/linux/include/dt-bindings/clock/
H A Dexynos4.h63 #define CLK_SCLK_SATA 150 /* Exynos4210 only */
76 #define CLK_SCLK_FIMD1 163 /* Exynos4210 only */
77 #define CLK_SCLK_MIPI1 164 /* Exynos4210 only */
108 #define CLK_TVENC 270 /* Exynos4210 only */
126 #define CLK_FIMD1 288 /* Exynos4210 only */
127 #define CLK_MIE1 289 /* Exynos4210 only */
128 #define CLK_DSIM1 290 /* Exynos4210 only */
129 #define CLK_SMMU_FIMD1 291 /* Exynos4210 only */
133 #define CLK_SATA_PHY 295 /* Exynos4210 only */
140 #define CLK_SATA 302 /* Exynos4210 only */
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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dsamsung,exynos-usb2.yaml15 - samsung,exynos4210-ehci
16 - samsung,exynos4210-ohci
61 const: samsung,exynos4210-ohci
74 compatible = "samsung,exynos4210-ehci";
100 compatible = "samsung,exynos4210-ohci";
/openbmc/qemu/hw/intc/
H A Dexynos4210_combiner.c2 * Samsung exynos4210 Interrupt Combiner
24 * Exynos4210 Combiner represents an OR gate for SOC's IRQ lines. It combines
35 #include "hw/arm/exynos4210.h"
54 .name = "exynos4210.combiner.groupstate",
65 .name = "exynos4210.combiner",
122 hw_error("exynos4210.combiner: overflow of reg_set by 0x" in exynos4210_combiner_read()
186 hw_error("exynos4210.combiner: unallowed write access at offset 0x" in exynos4210_combiner_write()
192 hw_error("exynos4210.combiner: unallowed write access at offset 0x" in exynos4210_combiner_write()
198 hw_error("exynos4210.combiner: overflow of reg_set by 0x" in exynos4210_combiner_write()
248 hw_error("exynos4210.combiner: unallowed write access at offset 0x" in exynos4210_combiner_write()
[all …]
H A Dexynos4210_gic.c2 * Samsung exynos4210 GIC implementation. Based on hw/arm_gic.c
31 #include "hw/arm/exynos4210.h"
76 memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container", in exynos4210_gic_realize()
78 memory_region_init(&s->dist_container, obj, "exynos4210-dist-container", in exynos4210_gic_realize()
88 g_autofree char *cpu_alias_name = g_strdup_printf("exynos4210-gic-alias_cpu%u", i); in exynos4210_gic_realize()
89 g_autofree char *dist_alias_name = g_strdup_printf("exynos4210-gic-alias_dist%u", i); in exynos4210_gic_realize()
/openbmc/qemu/include/hw/arm/
H A Dexynos4210.h2 * Samsung exynos4210 SoC emulation
61 * exynos4210 IRQ subsystem stub definitions.
108 #define TYPE_EXYNOS4210_SOC "exynos4210"
114 /* Get IRQ number from exynos4210 IRQ subsystem stub.
121 * exynos4210 UART
/openbmc/u-boot/arch/arm/mach-exynos/
H A DKconfig15 are multiple SoCs in this family including Exynos4210, Exynos4412,
56 bool "Exynos4210 SMDKV310 board"
61 bool "Exynos4210 Trats board"
64 bool "EXYNOS4210 Universal C210 board"
/openbmc/linux/arch/arm/mach-exynos/
H A Dexynos.c52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { in exynos_sysram_init()
64 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { in exynos_sysram_init()
80 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid")) in exynos_fdt_map_chipid()
178 if (of_machine_is_compatible("samsung,exynos4210") || in exynos_dt_machine_init()
182 if (of_machine_is_compatible("samsung,exynos4210") || in exynos_dt_machine_init()
197 "samsung,exynos4210",
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsamsung,exynos4210-combiner.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/samsung,exynos4210-combiner.yaml#
16 a parent interrupt controller, such as GIC in case of Exynos4210.
35 const: samsung,exynos4210-combiner
76 compatible = "samsung,exynos4210-combiner";
/openbmc/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dexynos-pmu.yaml19 - samsung,exynos4210-pmu
39 - samsung,exynos4210-pmu
54 - samsung,exynos4210-pmu
130 - samsung,exynos4210-pmu
149 - samsung,exynos4210-pmu
/openbmc/qemu/hw/arm/
H A Dexynos4210.c2 * Samsung exynos4210 SoC emulation
36 #include "hw/arm/exynos4210.h"
438 * Get IRQ number from exynos4210 IRQ subsystem stub.
508 /* Exynos4210 has 0x9 as cluster ID */ in exynos4210_calc_affinity()
639 "exynos4210.chipid", sizeof(chipid_and_omr)); in exynos4210_realize()
644 memory_region_init_rom(&s->irom_mem, OBJECT(socdev), "exynos4210.irom", in exynos4210_realize()
650 "exynos4210.irom_alias", &s->irom_mem, 0, in exynos4210_realize()
656 memory_region_init_ram(&s->iram_mem, NULL, "exynos4210.iram", in exynos4210_realize()
665 sysbus_create_simple("exynos4210.pmu", EXYNOS4210_PMU_BASE_ADDR, NULL); in exynos4210_realize()
667 sysbus_create_simple("exynos4210.clk", EXYNOS4210_CLK_BASE_ADDR, NULL); in exynos4210_realize()
[all …]
H A Dexynos4_boards.c32 #include "hw/arm/exynos4210.h"
97 memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", in exynos4_boards_init_ram()
105 memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, in exynos4_boards_init_ram()
161 mc->desc = "Samsung NURI board (Exynos4210)"; in nuri_class_init()
180 mc->desc = "Samsung SMDKC210 board (Exynos4210)"; in smdkc210_class_init()
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dsamsung-sss.yaml21 The SSS module in Exynos4 (Exynos4210) and Exynos5 (Exynos5420 and Exynos5250)
32 - samsung,exynos4210-secss # for Exynos4210, Exynos4212,
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Dpd-samsung.yaml22 - samsung,exynos4210-pd
57 compatible = "samsung,exynos4210-pd";
64 compatible = "samsung,exynos4210-pd";
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsamsung,s3c6410-sdhci.yaml17 - samsung,exynos4210-sdhci
52 - samsung,exynos4210-sdhci
71 compatible = "samsung,exynos4210-sdhci";

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