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19 Enabling this allows the use of SHA operations in hardware without32 Enabling this allows the use of SHA operations in hardware without requiring the42 Enabling this allows the use of ECC/RSA operations in hardware without requiring the
7 Enabling I-cache:10 Enabling D-cache:13 Enabling Caches at System Startup:
5 because NOLO has already configured the board. Only needed is enabling83 For enabling USB TTY just add this line to file include/configs/nokia_rx51.h91 crash or no access to mtd. For enabling ONENAND support add this line at begin100 flashed with attached zImage to RX-51 kernel nand area. For enabling UBIFS
2 # And enabling the `wayland` option without enabling `egl` is useless.
2 Enabling migration QMP events on A...5 Enabling migration QMP events on B...24 Enabling migration QMP events on A...
2 Enabling migration QMP events on B...5 Enabling migration QMP events on A...
45 /* Enabling USBHOST_PHY */ in exynos5_set_usbhost_phy_ctrl()61 /* Enabling USBHOST_PHY */ in exynos4412_set_usbhost_phy_ctrl()94 /* Enabling USBDRD_PHY */ in exynos5_set_usbdrd_phy_ctrl()110 /* Enabling USBDEV_PHY */ in exynos5420_set_usbdev_phy_ctrl()
37 * enabling paging. in get_gicd_base_address()120 * CPU and will be set later when enabling the GIC for each core in armv7_init_nonsec()130 * ram, so need to relocate secure section before enabling other in armv7_init_nonsec()
22 * The TI PMU65861C needs a 3.75ms delay between enabling in enable_cpu_power_rail()23 * the power rail and enabling the CPU clock. This delay in enable_cpu_power_rail()
26 /* Optional active high pin enabling writes to latched power_up pins. */30 /* Selectable polarity pins enabling host power rails. */
11 # enabling crypto_cipher, requires also enabling of crypto_hash.