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/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,embedded-trace-extension.yaml15 Arm Embedded Trace Extension(ETE) is a per CPU trace component that
18 The trace generated by the ETE could be stored via legacy CoreSight
20 Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to
26 pattern: "^ete([0-9a-f]+)$"
33 Handle to the cpu this ETE is bound to.
41 Output connections from the ETE to legacy CoreSight trace bus.
45 description: Output connection from the ETE to legacy CoreSight Trace bus.
56 # An ETE node without legacy CoreSight connections
62 # An ETE node with legacy CoreSight connections
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
H A Dtrace.json8 …"PublicDescription": "This event is generated each time an event is signaled by ETE external event…
12 …"PublicDescription": "This event is generated each time an event is signaled by ETE external event…
16 …"PublicDescription": "This event is generated each time an event is signaled by ETE external event…
20 …"PublicDescription": "This event is generated each time an event is signaled by ETE external event…
/openbmc/linux/drivers/hwtracing/coresight/
H A DKconfig101 tristate "CoreSight ETMv4.x / ETE driver"
107 version 4.x and the Embedded Trace Extensions (ETE). Both are CPU tracer
196 TRBE always needs to be used along with its corresponding percpu ETE
197 component. ETE generates trace data which is then captured with TRBE.
199 system registers. But its explicit dependency with trace unit (ETE)
H A Dcoresight-trbe.c5 * device (ETE) thus generating required trace data. Trace can be enabled
31 * sinks and thus we use ETE trace packets to pad the
39 * This is about 44bytes of ETE trace. To be on
268 * ETE and thus there might be some amount of trace that was in trbe_report_wrap_event()
361 * The ETE trace has alignment synchronization packets allowing in trbe_snapshot_offset()
H A Dcoresight-etm4x-core.c133 pr_warn_ratelimited("ete: trying to read unsupported register @%x\n", in ete_sysreg_read()
153 pr_warn_ratelimited("ete: trying to write to unsupported register @%x\n", in ete_sysreg_write()
511 * ETE mandates that the TRCRSR is written to before in etm4_enable_hw()
2012 type_name = "ete"; in etm4_add_coresight_dev()
2013 /* ETE v1 has major version == 0b101. Adjust this for logging.*/ in etm4_add_coresight_dev()
H A Dcoresight-etm4x-sysfs.c2473 * Common registers to ETE & ETM4x accessible via system in etm4x_register_implemented()
2480 * We only support etm4x and ete. So if the device is not in etm4x_register_implemented()
2481 * ETE, it must be ETMv4x. in etm4x_register_implemented()
2494 * Also ETE doesn't implement memory mapped access, thus in etm4x_register_implemented()
2533 * the ETM / ETE variant are visible.
H A Dcoresight-platform.c675 * e.g., ETE in acpi_coresight_parse_graph()
H A Dcoresight-etm4x.h479 /* ETE only supports system register access */
/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight-trbe.rst16 generators (ETE), are plugged in as source device.
19 driven via the CoreSight driver framework to support the ETE (which is
/openbmc/linux/tools/perf/util/cs-etm-decoder/
H A Dcs-etm-decoder.c187 config->reg_configr = params->ete.reg_configr; in cs_etm_decoder__gen_ete_config()
188 config->reg_traceidr = params->ete.reg_traceidr; in cs_etm_decoder__gen_ete_config()
189 config->reg_idr0 = params->ete.reg_idr0; in cs_etm_decoder__gen_ete_config()
190 config->reg_idr1 = params->ete.reg_idr1; in cs_etm_decoder__gen_ete_config()
191 config->reg_idr2 = params->ete.reg_idr2; in cs_etm_decoder__gen_ete_config()
192 config->reg_idr8 = params->ete.reg_idr8; in cs_etm_decoder__gen_ete_config()
193 config->reg_devarch = params->ete.reg_devarch; in cs_etm_decoder__gen_ete_config()
674 csid = (t_params->ete.reg_traceidr & CORESIGHT_TRACE_ID_VAL_MASK); in cs_etm_decoder__create_etm_decoder()
H A Dcs-etm-decoder.h57 struct cs_ete_trace_params ete; member
/openbmc/linux/tools/perf/arch/arm/util/
H A Dcs-etm.c519 int etmv3 = 0, etmv4 = 0, ete = 0; in cs_etm_info_priv_size() local
533 ete++; in cs_etm_info_priv_size()
548 ete++; in cs_etm_info_priv_size()
559 (ete * CS_ETE_PRIV_SIZE) + in cs_etm_info_priv_size()
647 * ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13. in cs_etm_is_ete()
709 /* ETE uses the same registers as ETMv4 plus TRCDEVARCH */ in cs_etm_save_ete_header()
/openbmc/linux/tools/perf/util/
H A Dcs-etm.h87 * ETE metadata is ETMv4 plus TRCDEVARCH register and doesn't support header V0 since it was
H A Dcs-etm.c674 t_params[idx].ete.reg_idr0 = metadata[idx][CS_ETE_TRCIDR0]; in cs_etm__set_trace_param_ete()
675 t_params[idx].ete.reg_idr1 = metadata[idx][CS_ETE_TRCIDR1]; in cs_etm__set_trace_param_ete()
676 t_params[idx].ete.reg_idr2 = metadata[idx][CS_ETE_TRCIDR2]; in cs_etm__set_trace_param_ete()
677 t_params[idx].ete.reg_idr8 = metadata[idx][CS_ETE_TRCIDR8]; in cs_etm__set_trace_param_ete()
678 t_params[idx].ete.reg_configr = metadata[idx][CS_ETE_TRCCONFIGR]; in cs_etm__set_trace_param_ete()
679 t_params[idx].ete.reg_traceidr = metadata[idx][CS_ETE_TRCTRACEIDR]; in cs_etm__set_trace_param_ete()
680 t_params[idx].ete.reg_devarch = metadata[idx][CS_ETE_TRCDEVARCH]; in cs_etm__set_trace_param_ete()
3150 if (HAS_PARAM(j, ETE, TS_SOURCE) || metadata[j][CS_ETE_TS_SOURCE] != 1) in cs_etm__has_virtual_ts()
/openbmc/linux/arch/m68k/fpsp040/
H A Dget_op.S622 | if (ete =$7fff) then INF or NAN
628 | if (ete = $0000) then
/openbmc/linux/drivers/usb/cdns3/
H A Dcdnsp-gadget.h1000 * is enabled (ETE).
1008 * enabled (ETE).
/openbmc/linux/drivers/usb/host/
H A Dxhci.h1051 /* xhci 1.1 uses the TD_SIZE field for TBC if Extended TBC is enabled (ETE) */
1056 /* Total burst count field, Rsvdz on xhci 1.1 with Extended TBC enabled (ETE) */
H A Dxhci-ring.c4240 /* xhci 1.1 with ETE uses TD_Size field for TBC, old is Rsvdz */ in xhci_queue_isoc_tx()
4282 /* xhci 1.1 with ETE uses TD Size field for TBC */ in xhci_queue_isoc_tx()