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/openbmc/openbmc/poky/meta/files/common-licenses/
H A DBorceux10 diagram/Diagram
11 diagram/MaxiDiagram
12 diagram/MicroDiagram
13 diagram/MiniDiagram
14 diagram/MultipleArrows
H A DBarr1 This is a package of commutative diagram macros built on top of Xy-pic by Michael Barr (email: bar…
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,hi3660-usb3.yaml29 hisilicon,eye-diagram-param:
32 description: Eye diagram for phy.
38 - hisilicon,eye-diagram-param
50 hisilicon,eye-diagram-param = <0x22466e4>;
H A Dhisilicon,hi3670-usb3.yaml34 hisilicon,eye-diagram-param:
37 description: Eye diagram for phy.
48 - hisilicon,eye-diagram-param
62 hisilicon,eye-diagram-param = <0xfdfee4>;
H A Dhisilicon,phy-hi3670-pcie.yaml45 hisilicon,eye-diagram-param:
47 description: Eye diagram for phy.
55 - hisilicon,eye-diagram-param
79 hisilicon,eye-diagram-param = <0xffffffff 0xffffffff
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-edp.yaml37 vast majority of panel datasheets have a power sequence diagram that
39 cares about different timings in this diagram but the fact that the
40 diagram is so similar means we can come up with a single driver to
45 sequence. This is because much of this diagram comes straight from
102 from power on (timing T3 in the diagram above). If we have no way to
/openbmc/obmc-console/docs/
H A Dmux-support.md8 the [Example Diagram](#example-diagram)
56 and [Example Diagram](#example-diagram)
156 ## Example Diagram
/openbmc/linux/Documentation/gpu/amdgpu/display/
H A Ddcn-overview.rst8 generic diagram, and we have variations per ASIC.
12 Based on this diagram, we can pass through each block and briefly describe
51 The above diagram is an architecture generalization of DCN, which means that
62 sophisticated communication interface which is highlighted in the diagram by
158 The first thing to notice from the diagram and DTN log it is the fact that we
162 we can split this single pipe differently, as described in the below diagram:
/openbmc/docs/designs/
H A Ddesign-template.md39 - If you would like to provide a diagram with your spec, ASCII diagrams are
43 inline feedback on the diagram itself.
92 code. Use a diagram when necessary. Cover major structural elements in a very
H A Dmulti-host-postcode.md19 The below component diagram shows the design for single-host postcode and
24 Diagram Legend: |Label|Signifies| |-----|---------| |`I:` |D-Bus interface|
97 **Interface Diagram**
99 Provided below the post code interface diagram with flow sequence
/openbmc/linux/Documentation/RCU/Design/Memory-Ordering/
H A DTree-RCU-Memory-Ordering.rst286 diagram above.
360 The diagram below shows the path of ordering if the leftmost
371 in the following diagram.
411 following diagram:
426 diagram happens after the start of the grace period. In addition, this
463 diagram, clearing bits from each ``rcu_node`` structure's ``->qsmask``
493 precede the idle period (the oval near the top of the diagram above)
497 the bottom of the diagram above).
556 | RCU. But this diagram is complex enough as it is, so simplicity |
559 | `stitched-together diagram <Putting It All Together_>`__. |
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/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rv1126.c269 * Clock-Architecture Diagram 2
392 * Clock-Architecture Diagram 1
399 * Clock-Architecture Diagram 3
416 * Clock-Architecture Diagram 4
626 * Clock-Architecture Diagram 6
723 * Clock-Architecture Diagram 9
766 * Clock-Architecture Diagram 12
888 * Clock-Architecture Diagram 15
904 * Clock-Architecture Diagram 3
919 * Clock-Architecture Diagram 4
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H A Dclk-rk3328.c266 * Clock-Architecture Diagram 1
282 * Clock-Architecture Diagram 2
345 * Clock-Architecture Diagram 3
438 * Clock-Architecture Diagram 4
496 * Clock-Architecture Diagram 5
565 * Clock-Architecture Diagram 6
602 * Clock-Architecture Diagram 7
654 * Clock-Architecture Diagram 8
700 * Clock-Architecture Diagram 9
H A Dclk-px30.c266 * Clock-Architecture Diagram 1
274 * Clock-Architecture Diagram 3
328 * Clock-Architecture Diagram 4
380 * Clock-Architecture Diagram 5
402 * Clock-Architecture Diagram 6
453 * Clock-Architecture Diagram 7
570 * Clock-Architecture Diagram 8
793 * Clock-Architecture Diagram 9
916 * Clock-Architecture Diagram 2
966 * Clock-Architecture Diagram 9
/openbmc/openbmc/meta-facebook/meta-minerva/recipes-phosphor/initrdscripts/phosphor-static-norootfs-init/
H A D99-platform-init23 # Below is the diagram of the smart valve implemtation on the CMM.
30 # Diagram:
/openbmc/linux/Documentation/driver-api/pldmfw/
H A Dfile-format.rst12 This diagram provides an overview of the file format::
57 The following diagram provides an overview of the package header::
90 The following diagram provides an overview of the device record area::
145 The following diagram provides an overview of the component area::
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-hns-nic.txt17 port-id can be 2 to 7. Here is the diagram:
44 to the CPU. The port-idx-in-ae can be 0 to 5. Here is the diagram:
/openbmc/linux/Documentation/driver-api/
H A Dinterconnect.rst22 Below is a simplified diagram of a real-world SoC interconnect bus topology.
56 The interconnect providers on the above diagram are M NoC, S NoC, C NoC, P NoC
62 providers. The point on the diagram where the CPUs connect to the memory is
/openbmc/u-boot/cmd/aspeed/
H A Ddptest.h179 #define PRINT_ITEM_A printf("3.1 Eye Diagram Test - PRBS7\n");\
211 #define PRINT_ITEM_K printf("3.1 Eye Diagram Test with No Cable Mode - HBR2CPAT\n");\
212 printf("3.1 Eye Diagram Test - HBR2CPAT\n");\
/openbmc/google-misc/subprojects/ncsid/doc/
H A Dncsid_internals.md7 ![Internals Diagram](ncsid_arch.png)
9 In the diagram above the components are split into four groups:
/openbmc/u-boot/board/hisilicon/poplar/
H A Dpoplar.c106 /* adjust eye diagram */ in usb2_phy_config()
108 /* adjust eye diagram */ in usb2_phy_config()
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml15 interesting 2-layered approach to pin muxing best illustrated by the diagram
36 The big MUX in the diagram only has 7 different ways of mapping peripherals
40 diagram only shows UART0 and UART1, but this also includes a number of other
/openbmc/linux/Documentation/scsi/scsi_transport_srp/
H A Dfigures.rst3 SCSI RDMA (SRP) transport class diagram
/openbmc/u-boot/doc/imx/habv4/
H A Dintroduction_habv4.txt36 The diagram below illustrate the secure boot process overview:
91 The diagram below illustrate the encrypted boot process overview:
167 The diagram below illustrate the PKI tree:
213 The diagram below illustrate the PKI tree generated:
/openbmc/qemu/include/standard-headers/linux/
H A Dethtool.h976 * indicates that the PSE State diagram is in the state DISABLED.
978 * indicates the PSE State diagram is in a state other than those
981 * "deliveringPower" indicates that the PSE State diagram is in the
984 * the PSE State diagram is in the state TEST_MODE.
986 * the PSE State diagram is in the state TEST_ERROR.
988 * indicates that the PSE State diagram is in the state IDLE due to
1020 * asserted true when the PoDL PSE state diagram variable mr_pse_enable is
1023 * asserted true when either of the PSE state diagram variables
1026 * is asserted true when the PoDL PSE state diagram variable pi_powered is
1029 * true when the PoDL PSE state diagram variable pi_sleeping is true."
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