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/openbmc/linux/Documentation/hwmon/
H A Dsmpro-hwmon.rst60 temp5_crit millicelsius RO MEM HOT Threshold for all DIMMs
62 temp6_crit millicelsius RO MEM HOT Threshold for all DIMMs
64 temp7_crit millicelsius RO MEM HOT Threshold for all DIMMs
66 temp8_crit millicelsius RO MEM HOT Threshold for all DIMMs
68 temp9_crit millicelsius RO MEM HOT Threshold for all DIMMs
70 temp10_crit millicelsius RO MEM HOT Threshold for all DIMMs
72 temp11_crit millicelsius RO MEM HOT Threshold for all DIMMs
74 temp12_crit millicelsius RO MEM HOT Threshold for all DIMMs
/openbmc/u-boot/drivers/ddr/fsl/
H A Dlc_common_dimm_params.c38 /* validate if the memory clk is in the range of dimms */ in compute_cas_latency()
52 /* check if the dimms support the CAS latency */ in compute_cas_latency()
91 * Compute a CAS latency suitable for all DIMMs in compute_cas_latency()
94 * CAS latency defined by all DIMMs. in compute_cas_latency()
98 * Step 1: find CAS latency common to all DIMMs using bitwise in compute_cas_latency()
134 /* Check if this CAS latency will work on all DIMMs at tCK. */ in compute_cas_latency()
192 * with the assumption that all of the DIMMs will support a dereated in compute_cas_latency()
209 * Determine the worst-case DIMM timing parameters from the set of DIMMs
352 debug("no dimms this memory controller\n"); in compute_lowest_common_dimm_parameters()
391 /* Determine common burst length for all DIMMs. */ in compute_lowest_common_dimm_parameters()
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/openbmc/webui-vue/src/store/modules/HardwareStatus/
H A DMemoryStore.js7 dimms: [], property in MemoryStore.state
10 dimms: (state) => state.dimms,
14 state.dimms = data.map(({ data }) => {
/openbmc/linux/Documentation/misc-devices/
H A Deeprom.rst29 24C01A 1K 0x50 - 0x57 (Typical device on DIMMs)
65 effective for decoding the contents of EEPROMs on DIMMs.
67 DIMMS will typically contain a 24C01A or 24C02, or the 34C02 variants.
97 to change the contents of the EEPROMs (on DIMMs anyway) also makes it easy
98 to disable the DIMMs (potentially preventing the computer from booting)
/openbmc/linux/drivers/edac/
H A Dghes_edac.c44 struct dimm_info *dimms; member
216 new = krealloc_array(hw->dimms, hw->num_dimms + 16, in enumerate_dimms()
223 hw->dimms = new; in enumerate_dimms()
226 d = &hw->dimms[hw->num_dimms]; in enumerate_dimms()
401 * We have only one logical memory controller to which all DIMMs belong. in ghes_edac_register()
437 pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n"); in ghes_edac_register()
449 src = &ghes_hw.dimms[i]; in ghes_edac_register()
499 kfree(ghes_hw.dimms); in ghes_edac_register()
500 ghes_hw.dimms = NULL; in ghes_edac_register()
H A Dskx_common.h34 #define SKX_NUM_DIMMS 2 /* Max DIMMS per channel */
103 int num_dimms; /* dimms per channel */
120 } dimms[NUM_DIMMS]; member
200 /* DDR DIMMs per DDR memory channel */
208 /* HBM DIMMs per HBM memory channel */
H A Dbluefield_edac.c179 /* Initialize the DIMMs information for the given memory controller. */
189 dimm = mci->dimms[i]; in bluefield_edac_init_dimms()
258 /* Read the DIMMs per MC from ACPI table. */ in bluefield_edac_mc_probe()
260 dev_warn(dev, "bf_edac: DIMMs per MC unknown\n"); in bluefield_edac_mc_probe()
265 dev_warn(dev, "bf_edac: DIMMs per MC not valid\n"); in bluefield_edac_mc_probe()
H A Dedac_mc.c129 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n", in edac_mc_dump_mci()
130 mci->tot_dimms, mci->dimms); in edac_mc_dump_mci()
183 if (mci->dimms) { in mci_release()
185 kfree(mci->dimms[i]); in mci_release()
186 kfree(mci->dimms); in mci_release()
264 mci->dimms = kcalloc(mci->tot_dimms, sizeof(*mci->dimms), GFP_KERNEL); in edac_mc_alloc_dimms()
265 if (!mci->dimms) in edac_mc_alloc_dimms()
278 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL); in edac_mc_alloc_dimms()
281 mci->dimms[idx] = dimm; in edac_mc_alloc_dimms()
349 * Calculate the total amount of dimms and csrows/cschannels while in edac_mc_alloc()
[all …]
/openbmc/u-boot/board/freescale/mpc8641hpcn/
H A Dddr.c45 * DIMMs have fewer center values that require two separated tables, copy the
48 const struct board_specific_parameters *dimms[] = { variable
72 pbsp = dimms[ctrl_num]; in fsl_ddr_board_options()
/openbmc/webui-vue/src/views/HardwareStatus/Inventory/
H A DInventory.vue35 <table-dimm-slot ref="dimms" />
115 id: 'dimms',
116 dataRef: 'dimms',
117 href: '#dimms',
H A DInventoryTableDimmSlot.vue13 :total-number-of-cells="dimms.length"
24 :items="dimms"
265 : this.dimms.length;
267 dimms() {
268 return this.$store.getters['memory/dimms'];
/openbmc/linux/include/linux/
H A Dedac.h545 * sees memory sticks ("dimms"), and the ones that sees memory ranks.
558 struct dimm_info **dimms; member
612 for ((dimm) = (mci)->dimms[0]; \
615 ? (mci)->dimms[(dimm)->idx + 1] \
627 * For 1 layer, this function returns "dimms[layer0]";
630 * array and returning "dimms[layer0][layer1]";
633 * array and returning "dimms[layer0][layer1][layer2]";
656 if (WARN_ON_ONCE(mci->dimms[index]->idx != index)) in edac_get_dimm()
659 return mci->dimms[index]; in edac_get_dimm()
/openbmc/u-boot/board/freescale/mpc8548cds/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/socrates/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8555cds/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8541cds/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/sbc8641d/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8544ds/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
53 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8610hpcd/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
53 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/mpc8536ds/
H A Dddr.c37 * - number of DIMMs in fsl_ddr_board_options()
50 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/xes/xpedite520x/
H A Dddr.c52 * - number of DIMMs in fsl_ddr_board_options()
65 * - number of DIMMs installed in fsl_ddr_board_options()
/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A DREADME25 As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
30 they don't have regular DIMMs.
/openbmc/linux/Documentation/driver-api/nvdimm/
H A Dnvdimm.rst52 may span an interleave of several DIMMs.
57 Once more DIMMs are added a memory controller interleave must be
136 striped) across multiple DIMMs. When interleaved the platform may optionally
137 provide details of which DIMMs are participating in the interleave.
176 In this platform we have four DIMMs and two memory controllers in one
187 system-physical-address range, REGION1, that spans those two DIMMs as
307 Note that the kernel device name for "DIMMs" is "nmemX". The NFIT
310 be physical DIMMs, so we use a more generic name.
349 Note, in this example we are assuming NFIT-defined DIMMs which are
/openbmc/linux/tools/testing/nvdimm/test/
H A Dndtest.c178 .dimms = dimm_group1,
186 .dimms = dimm_group2,
429 if (uuid_parse(p->config->dimms[ndimm].uuid_str, (uuid_t *)uuid)) { in ndtest_create_region()
448 mappings[i].nvdimm = p->config->dimms[ndimm].nvdimm; in ndtest_create_region()
482 if (p->config->dimms[i].dev) { in put_dimms()
483 device_unregister(p->config->dimms[i].dev); in put_dimms()
484 p->config->dimms[i].dev = NULL; in put_dimms()
759 d = &p->config->dimms[i]; in ndtest_nvdimm_init()
941 /* Each instance can be taken as a bus, which can have multiple dimms */ in ndtest_init()

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