| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | brcm,iproc-clocks.yaml | 16 LCPLL0, MIPIPLL, and etc., all derived from an onboard crystal. Each PLL
20 reference clock of the onboard crystal.
60 most iProc PLLs, this is an onboard crystal with a fixed rate.
109 crystal N/A N/A N/A
111 armpll crystal N/A N/A
113 keypad crystal (ASIU) 0 BCM_CYGNUS_ASIU_KEYPAD_CLK
114 adc/tsc crystal (ASIU) 1 BCM_CYGNUS_ASIU_ADC_CLK
115 pwm crystal (ASIU) 2 BCM_CYGNUS_ASIU_PWM_CLK
117 genpll crystal 0 BCM_CYGNUS_GENPLL
125 lcpll0 crystal 0 BCM_CYGNUS_LCPLL0
[all …]
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| H A D | vf610-clock.txt | 16 - sxosc (external crystal oscillator 32KHz, recommended)
17 - fxosc (external crystal oscillator 24MHz, recommended)
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| H A D | renesas,r9a06g032-sysctrl.yaml | 23 - description: External 40 MHz crystal
24 - description: Optional external 32.768 kHz crystal
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| H A D | samsung,s5pv210-clock.yaml | 18 - "xxti" - external crystal oscillator connected to XXTI and XXTO pins of
20 - "xusbxti" - external crystal oscillator connected to XUSBXTI and XUSBXTO
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| H A D | idt,versaclock5.yaml | 141 # Devices with builtin crystal + optional external input
148 # Devices without builtin crystal
159 /* 25MHz reference crystal */
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| /openbmc/linux/arch/powerpc/boot/ |
| H A D | mpc8xx.c | 19 /* Return system clock from crystal frequency */
20 u32 mpc885_get_clock(u32 crystal) in mpc885_get_clock() argument
46 ret = crystal * mfi; in mpc885_get_clock()
49 ret += crystal * mfn / (mfd + 1); in mpc885_get_clock()
70 int mpc885_fixup_clocks(u32 crystal) in mpc885_fixup_clocks() argument
72 u32 sysclk = mpc885_get_clock(crystal); in mpc885_fixup_clocks()
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| H A D | pq2.c | 25 /* Get various clocks from crystal frequency.
28 int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq, in pq2_get_clocks() argument
50 mainclk = crystal * (pllmf + 1) / (plldf + 1); in pq2_get_clocks()
90 int pq2_fixup_clocks(u32 crystal) in pq2_fixup_clocks() argument
94 if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq)) in pq2_fixup_clocks()
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| H A D | mpc8xx.h | 9 u32 mpc885_get_clock(u32 crystal);
10 int mpc885_fixup_clocks(u32 crystal);
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| H A D | pq2.h | 7 int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq,
10 int pq2_fixup_clocks(u32 crystal);
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | pllnv04.c | 48 int crystal = info->refclk; in getMNP_single() local
55 /* possibly correlated with introduction of 27MHz crystal */ in getMNP_single()
93 if (crystal/M < minU) in getMNP_single()
95 if (crystal/M > maxU) in getMNP_single()
98 /* add crystal/2 to round better */ in getMNP_single()
99 N = (clkP * M + crystal/2) / crystal; in getMNP_single()
107 calcclk = ((N * crystal + P/2) / P + M/2) / M; in getMNP_single()
149 int crystal = info->refclk; in getMNP_double() local
165 if (crystal/M1 < minU1) in getMNP_double()
167 if (crystal/M1 > maxU1) in getMNP_double()
[all …]
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| /openbmc/linux/drivers/acpi/pmic/ |
| H A D | intel_pmic_chtcrc.c | 3 * Intel Cherry Trail Crystal Cove PMIC operation region driver
16 * We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel
17 * code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal
24 * CHT Crystal Cove PMIC.
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| H A D | Kconfig | 14 bool "ACPI operation region support for Bay Trail Crystal Cove PMIC"
18 version of the Crystal Cove PMIC.
21 bool "ACPI operation region support for Cherry Trail Crystal Cove PMIC"
25 version of the Crystal Cove PMIC.
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| /openbmc/linux/Documentation/devicetree/bindings/rtc/ |
| H A D | stmp3xxx-rtc.txt | 11 - stmp,crystal-freq: override crystal frequency as determined from fuse bits.
13 "no crystal".
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| /openbmc/linux/drivers/tty/serial/ |
| H A D | max3100.c | 15 .crystal = 0,
119 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */ member
452 if (s->crystal) in max3100_set_termios()
458 param_new = 14 + s->crystal; in max3100_set_termios()
461 param_new = 13 + s->crystal; in max3100_set_termios()
464 param_new = 12 + s->crystal; in max3100_set_termios()
467 param_new = 11 + s->crystal; in max3100_set_termios()
470 param_new = 10 + s->crystal; in max3100_set_termios()
473 param_new = 9 + s->crystal; in max3100_set_termios()
476 param_new = 8 + s->crystal; in max3100_set_termios()
[all …]
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| /openbmc/linux/include/linux/ |
| H A D | serial_max3100.h | 15 * @crystal: 1 for 3.6864 Mhz, 0 for 1.8432
26 * .crystal = 0,
43 int crystal; member
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| /openbmc/linux/Documentation/devicetree/bindings/mips/cavium/ |
| H A D | uctl.txt | 20 either "crystal" or "external".
31 /* Either "crystal" or "external" */
32 refclk-type = "crystal";
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| /openbmc/linux/Documentation/devicetree/bindings/regulator/ |
| H A D | renesas,raa215300.yaml | 16 built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and coin cell
51 Use xin, if connected to an external crystal.
66 /* 32.768kHz crystal */
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| /openbmc/openbmc/poky/meta/files/common-licenses/ |
| H A D | CrystalStacker | 1 Crystal Stacker is freeware. This means you can pass copies around freely provided you include this…
5 NewCreature Design makes no guarantees regarding the Crystal Stacker software. We are not responsib…
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| /openbmc/linux/Documentation/devicetree/bindings/net/wireless/ |
| H A D | esp,esp8089.yaml | 19 esp,crystal-26M-en:
39 esp,crystal-26M-en = <2>;
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| /openbmc/linux/drivers/rtc/ |
| H A D | rtc-stmp3xxx.c | 300 * This clock can be provided by an external 32k crystal. If that one is in stmp3xxx_rtc_probe()
312 of_property_read_u32(pdev->dev.of_node, "stmp,crystal-freq", in stmp3xxx_rtc_probe()
317 /* keep 32kHz crystal running in low-power mode */ in stmp3xxx_rtc_probe()
324 /* keep 32.768kHz crystal running in low-power mode */ in stmp3xxx_rtc_probe()
332 "invalid crystal-freq specified in device-tree. Assuming no crystal\n"); in stmp3xxx_rtc_probe()
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| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | octeon-usb.txt | 25 "crystal" or "external".
54 cavium,refclk-type = "crystal";
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| /openbmc/u-boot/board/freescale/common/ |
| H A D | ics307_clk.c | 25 #define CRYSTAL 0 macro
47 * CLK2 and crystal
89 CLK2 << 19 | TTL << 21 | CRYSTAL << 22; in ics307_sysclk_calculator()
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| /openbmc/u-boot/doc/device-tree-bindings/clock/ |
| H A D | rockchip,rk3188-cru.txt | 32 - "xin24m" - crystal input - required,
34 - "xin27m" - 27mhz crystal input on rk3066 - optional,
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
| H A D | gf119.c | 114 return (device->crystal * 1000) / 20; in gf119_fan_pwm_clock()
116 return device->crystal * 1000 / 10; in gf119_fan_pwm_clock()
130 nvkm_wr32(device, 0x00e724, device->crystal * 1000); in gf119_therm_init()
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| /openbmc/linux/arch/x86/kernel/ |
| H A D | tsc_msr.c | 24 * use a 25 MHz crystal and Cherry Trail uses a 19.2 MHz crystal, the crystal
138 * 24 MHz crystal? : 24 * 13 / 4 = 78 MHz
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