| /openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | st-rproc.txt | 1 STMicroelectronics Co-Processor Bindings
2 ----------------------------------------
4 This binding provides support for adjunct processors found on ST SoCs.
6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the primary OS must detect its state
11 - compatible Should be one of:
12 "st,st231-rproc"
13 "st,st40-rproc"
14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../reset/reset.txt)
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| /openbmc/linux/include/linux/soc/apple/ |
| H A D | rtkit.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
6 * Apple's SoCs come with various co-processors running their RTKit operating
18 * Struct to represent implementation-specific RTKit operations.
21 * @iomem: Shared memory buffer controlled by the co-processors.
24 * @is_mapped: Shared memory buffer is managed by the co-processor.
38 * Struct to represent implementation-specific RTKit operations.
40 * @crashed: Called when the co-processor has crashed. Runs in process
43 * on a non-system endpoint. Called from a worker thread.
50 * buffer is managed by the co-processor and needs to be mapped.
74 * @mbox_name: mailbox name used to communicate with the co-processor
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| /openbmc/linux/arch/parisc/include/asm/ |
| H A D | ldcw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
6 and GCC only guarantees 8-byte alignment for stack locals, we can't
7 be assured of 16-byte alignment for atomic lock data even if we
10 type and dynamically select the 16-byte aligned int from the array
15 long as the ",CO" (coherent operation) completer is implemented, then the
16 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
17 they only require "natural" alignment (4-byte for ldcw, 8-byte for
20 Although the cache control hint is accepted by all PA 2.0 processors,
22 require 16-byte alignment. If the address is unaligned, the operation
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| /openbmc/linux/drivers/soc/apple/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 The PMGR block in Apple SoCs provides high-level power state
21 tristate "Apple RTKit co-processor IPC protocol"
26 Apple SoCs such as the M1 come with various co-processors running
|
| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | csky,mptimer.txt | 2 C-SKY Multi-processors Timer
5 C-SKY multi-processors timer is designed for C-SKY SMP system and the
6 regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event.
21 - compatible
25 - clocks
29 - interrupts
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | csky,mpintc.txt | 2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
6 SMP soc, and it also could be used in non-SMP system.
9 0-15 : software irq, and we use 15 as our IPI_IRQ.
10 16-31 : private irq, and we use 16 as the co-processor timer.
11 31-1024: common irq for soc ip.
13 Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)
27 - compatible
31 - #interrupt-cells
35 - interrupt-controller:
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| /openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | apple,mailbox.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
11 - Sven Peter <sven@svenpeter.dev>
15 messages between the main CPU and a co-processor. Multiple instances
17 One of the two FIFOs is used to send data to a co-processor while the other
25 - description:
30 - enum:
31 - apple,t8103-asc-mailbox
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| /openbmc/linux/drivers/mailbox/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 Apple SoCs have various co-processors required for certain
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
96 This driver provides support for inter-processor communication
118 to send message between processors. Say Y here if you want to use the
145 multiple processors within the SoC. Select this driver if your
155 between application processors and other processors/MCU/DSP. Select
165 between application processors and MCU. Say Y here if you want to
184 module will be called mailbox-mpfs.
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| /openbmc/u-boot/doc/ |
| H A D | README.xtensa | 1 U-Boot for the Xtensa Architecture
5 -------------------------------------
8 Diamond Cores are pre-configured instances available for license and
12 and custom instructions, registers and co-processors. The custom core
18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
19 in the cpu tree of U-Boot.
21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an
24 abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only
30 --------------------------------------------------------
33 a variant-specific directory located in the arch/xtensa/include/asm
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| H A D | README.davinci | 4 This README is about U-Boot support for TI's ARM 926EJS based family of SoCs.
10 co processors along with a host of other peripherals.
93 from a storage device and loads it into the IRAM. The UBL then loads the U-Boot
100 is provided to load U-Boot directly from SPI flash. In this case, the
102 To build U-Boot with this SPL, do
104 make u-boot.ais
105 and program the resulting u-boot.ais file to the SPI flash of the DA850 EVM.
149 http://focus.ti.com/docs/prod/folders/print/omap-l138.html
150 http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit
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| /openbmc/docs/designs/ |
| H A D | power-systems-memory-preserving-reboot.md | 15 don't have access to a non-volatile storage to store this content after a
18 explains the high-level flow of warm reboot and extraction of the resulting dump
23 - **Boot**: The process of initializing hardware components in a computer system
26 - **Hostboot**: The firmware runs on the host processors and performs all
28 [read more](https://github.com/open-power/docs/blob/master/hostboot/HostBoot_PG.md)
30 - **Self Boot Engine (SBE)**: A microcontroller built into the host processors
33 processor. [read more](https://sched.co/SPZP)
35 - **Master Processor**: The processor which gets initialized first to execute
38 - **POWER Hardware Abstraction Layer (PHAL)**: A software component on the BMC
41 - **Hypervisor**: A hypervisor (or virtual machine monitor, VMM) is a computer
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| /openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | ti,twl4030-madc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 The MADC subsystem in the TWL4030 consists of a 10-bit ADC
14 combined with a 16-input analog multiplexer.
18 const: ti,twl4030-madc
23 ti,system-uses-second-madc-irq:
27 to be used by Co-Processors (e.g. a modem).
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| /openbmc/linux/Documentation/devicetree/bindings/rtc/ |
| H A D | amlogic,meson-vrtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/amlogic,meson-vrtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
17 application processors (AP) and the secure co-processor (SCP.) When
19 program an always-on timer before going sleep. When the timer expires,
23 - $ref: rtc.yaml#
28 - amlogic,meson-vrtc
34 - compatible
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| /openbmc/linux/drivers/crypto/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 processors. This option alone does not add any kernel code.
20 Some VIA processors come with an integrated crypto engine
39 called padlock-aes.
50 Available in VIA C7 and newer processors.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
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| /openbmc/linux/arch/x86/kernel/cpu/ |
| H A D | hygon.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2018 Chengdu Haiguang IC Design Co., Ltd.
16 #include <asm/spec-ctrl.h>
38 for (i = apicid - 1; i >= 0; i--) { in nearby_node()
60 * (1) Hygon multi-node processors
62 * (2) Hygon processors supporting compute units
68 /* get information required for multi-node processors */ in hygon_get_topology()
75 c->cpu_die_id = ecx & 0xff; in hygon_get_topology()
77 c->cpu_core_id = ebx & 0xff; in hygon_get_topology()
80 c->x86_max_cores /= smp_num_siblings; in hygon_get_topology()
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| /openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | hab.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. All Rights Reserved.
15 * Security Reference Manual for i.MX 7Dual and 7Solo Applications Processors,
43 u8 len[2]; /* Length field in bytes (big-endian) */
47 /* -------- start of HAB API updates ------------*/
61 HAB_CFG_OPEN = 0xf0, /* < Non-secure IC */
68 HAB_STATE_CHECK = 0x55, /* Check state (non-secure) */
69 HAB_STATE_NONSECURE = 0x66, /* Non-secure state */
154 #define HAB_ENG_RTIC 0x05 /* Run-time integrity checker */
158 #define HAB_ENG_DCP 0x1b /* Data Co-Processor */
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| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-mp-csky.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
11 #include "timer-of.h"
68 to->clkevt.event_handler(&to->clkevt); in csky_timer_interrupt()
80 to->clkevt.cpumask = cpumask_of(cpu); in csky_mptimer_starting_cpu()
84 clockevents_config_and_register(&to->clkevt, timer_of_rate(to), in csky_mptimer_starting_cpu()
124 * Csky_mptimer is designed for C-SKY SMP multi-processors and in csky_mptimer_init()
129 * mmio map style. So we needn't mmio-address in dts, but we still in csky_mptimer_init()
137 return -EINVAL; in csky_mptimer_init()
142 return -EINVAL; in csky_mptimer_init()
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| /openbmc/u-boot/board/freescale/ls1021atwr/ |
| H A D | README | 2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
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| /openbmc/linux/drivers/input/touchscreen/ |
| H A D | mainstone-wm97xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mainstone-wm97xx.c -- Mainstone Continuous Touch screen driver for
7 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
16 * - codecs supported:- WM9705, WM9712, WM9713
17 * - processors supported:- Intel XScale PXA25x, PXA26x, PXA27x
31 #include <sound/pxa2xx-lib.h>
33 #include <asm/mach-types.h>
146 dev_dbg(wm->dev, "Raw coordinates: x=%x, y=%x, p=%x\n", in wm97xx_acc_pen_down()
157 input_report_abs(wm->input_dev, ABS_X, x & 0xfff); in wm97xx_acc_pen_down()
158 input_report_abs(wm->input_dev, ABS_Y, y & 0xfff); in wm97xx_acc_pen_down()
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| /openbmc/u-boot/board/freescale/ls1021aqds/ |
| H A D | README | 2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
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| /openbmc/linux/drivers/scsi/sym53c8xx_2/ |
| H A D | sym53c8xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * Copyright (C) 1998-2000 Gerard Roudier
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
16 * Stefan Esser <se@mi.Uni-Koeln.de>
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
37 * limited to 16 segments of 4 GB -> 64 GB max.
102 * It can be overridden at boot-up by the boot command line.
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| H A D | sym_nvram.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * Copyright (C) 1998-2000 Gerard Roudier
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
16 * Stefan Esser <se@mi.Uni-Koeln.de>
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
192 nvp->type = 0; in sym_read_nvram()
|
| H A D | sym_misc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * Copyright (C) 1998-2000 Gerard Roudier
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
16 * Stefan Esser <se@mi.Uni-Koeln.de>
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
31 * A la VMS/CAM-3 queue management.
39 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
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| H A D | sym_fw.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * of PCI-SCSI IO processors.
6 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * Copyright (C) 1998-2000 Gerard Roudier
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
16 * Stefan Esser <se@mi.Uni-Koeln.de>
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
152 #define SCRIPTA_BA(np, label) (np->fwa_bas.label)
153 #define SCRIPTB_BA(np, label) (np->fwb_bas.label)
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| /openbmc/linux/Documentation/admin-guide/media/ |
| H A D | fimc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| 2012 - 2013 Samsung Electronics Co., Ltd.
11 SoC Application Processors is an integrated camera host interface, color
17 drivers/media/platform/samsung/exynos4-is directory.
20 --------------
22 S5PC100 (mem-to-mem only), S5PV210, Exynos4210
25 ------------------
27 - camera parallel interface capture (ITU-R.BT601/565);
28 - camera serial interface capture (MIPI-CSI2);
29 - memory-to-memory processing (color space conversion, scaling, mirror
[all …]
|