| /openbmc/u-boot/board/gateworks/gw_ventana/ |
| H A D | gw_ventana_spl.c | 205 * calibration - these are the various CPU/DDR3 combinations we support
208 /* write leveling calibration determine */
211 /* Read DQS Gating calibration */
214 /* Read Calibration: DQS delay relative to DQ read access */
216 /* Write Calibration: DQ/DM delay relative to DQS write access */
222 /* write leveling calibration determine */
227 /* Read DQS Gating calibration */
232 /* Read Calibration: DQS delay relative to DQ read access */
235 /* Write Calibration: DQ/DM delay relative to DQS write access */
242 /* write leveling calibration determine */
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| /openbmc/u-boot/board/liebherr/display5/ |
| H A D | spl.c | 123 struct mx6_mmdc_calibration calibration = {0}; in spl_dram_print_cal() local
125 mmdc_read_calibration(sysinfo, &calibration); in spl_dram_print_cal()
127 debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); in spl_dram_print_cal()
128 debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); in spl_dram_print_cal()
129 debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); in spl_dram_print_cal()
130 debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); in spl_dram_print_cal()
131 debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); in spl_dram_print_cal()
132 debug(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); in spl_dram_print_cal()
133 debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); in spl_dram_print_cal()
134 debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); in spl_dram_print_cal()
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| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | ddrmc-vf610-calibration.h | 3 * ddrmc DDR3 calibration code for NXP's VF610
14 * Number of "samples" in the calibration bitmap
15 * to be considered during calibration.
21 * falling edge in the calibration bitmap
34 * ddrmc_calibration - Vybrid's (VF610) DDR3 calibration code
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| /openbmc/u-boot/board/k+p/kp_imx6q_tpc/ |
| H A D | kp_imx6q_tpc_spl.c | 186 struct mx6_mmdc_calibration calibration = {0}; in spl_dram_print_cal() local
188 mmdc_read_calibration(sysinfo, &calibration); in spl_dram_print_cal()
190 debug(".p0_mpdgctrl0\t= 0x%08X\n", calibration.p0_mpdgctrl0); in spl_dram_print_cal()
191 debug(".p0_mpdgctrl1\t= 0x%08X\n", calibration.p0_mpdgctrl1); in spl_dram_print_cal()
192 debug(".p0_mprddlctl\t= 0x%08X\n", calibration.p0_mprddlctl); in spl_dram_print_cal()
193 debug(".p0_mpwrdlctl\t= 0x%08X\n", calibration.p0_mpwrdlctl); in spl_dram_print_cal()
194 debug(".p0_mpwldectrl0\t= 0x%08X\n", calibration.p0_mpwldectrl0); in spl_dram_print_cal()
195 debug(".p0_mpwldectrl1\t= 0x%08X\n", calibration.p0_mpwldectrl1); in spl_dram_print_cal()
196 debug(".p1_mpdgctrl0\t= 0x%08X\n", calibration.p1_mpdgctrl0); in spl_dram_print_cal()
197 debug(".p1_mpdgctrl1\t= 0x%08X\n", calibration.p1_mpdgctrl1); in spl_dram_print_cal()
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| /openbmc/u-boot/board/ccv/xpress/ |
| H A D | imximage.cfg | 94 * Calibration setup
97 periodic HW ZQ calibration. */
100 * For target board, may need to run write leveling calibration to fine tune
105 /* Read DQS Gating calibration */
108 /* Read calibration */
111 /* Write calibration */
128 /* Complete calibration by forced measurement: */
131 * Calibration setup end
164 DATA 4 0x021b001c 0x04008040 /* MMDC0_MDSCR, ZQ calibration command sent to
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| /openbmc/u-boot/board/aristainetos/ |
| H A D | mt41j128M.cfg | 5 /* ZQ Calibration */
13 * DQS gating, read delay, write delay calibration values
14 * based on calibration compare of 0x00ffff00
33 /* Complete calibration by forced measurment */
60 /* ZQ calibration */
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| H A D | nt5cc256m16cp.cfg | 5 /* ZQ Calibration */
12 * DQS gating, read delay, write delay calibration values
31 /* Complete calibration by forced measurment */
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| /openbmc/u-boot/board/advantech/dms-ba16/ |
| H A D | samsung-2g.cfg | 9 /* Read DQS Gating calibration */
14 /* Read calibration */
17 /* Write calibration */
30 /* Complete calibration by forced measurment */
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| H A D | micron-1g.cfg | 9 /* Read DQS Gating calibration */
14 /* Read calibration */
17 /* Write calibration */
30 /* Complete calibration by forced measurment */
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| /openbmc/openbmc/poky/meta/recipes-graphics/xinput-calibrator/xinput-calibrator/ |
| H A D | Allow-xinput_calibrator_pointercal.sh-to-be-run-as-n.patch | 32 - echo "Empty calibration file found, removing it"
35 - echo "Using calibration data stored in $CALFILE"
50 + echo "Empty calibration file found, removing it"
53 + echo "Using calibration data stored in $CALFILE"
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| /openbmc/openbmc/meta-raspberrypi/recipes-graphics/xorg-xserver/xserver-xf86-config/rpi/xorg.conf.d/ |
| H A D | 99-calibration.conf | 2 Identifier "calibration"
4 Option "Calibration" "3800 200 200 3800"
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| /openbmc/openbmc/meta-facebook/meta-bletchley/recipes-bletchley/motor-ctrl/ |
| H A D | motor-ctrl_0.1.bb | 33 MOTOR_INIT_INSTFMT = "../motor-init-calibration@.service:${TGT}.wants/motor-init-calibration@{0}.se…
34 SYSTEMD_SERVICE:${PN} += "motor-init-calibration@.service"
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| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 115 * Stash old values in case calibration fails, in mmdc_do_write_level_calibration()
131 debug("Starting write leveling calibration.\n"); in mmdc_do_write_level_calibration()
134 * 2. disable auto refresh and ZQ calibration in mmdc_do_write_level_calibration()
135 * before proceeding with Write Leveling calibration in mmdc_do_write_level_calibration()
158 /* 6. Activate automatic calibration by setting MPWLGCR[HW_WL_EN] */ in mmdc_do_write_level_calibration()
177 debug("Ending write leveling calibration. Error mask: 0x%x\n", errors); in mmdc_do_write_level_calibration()
290 /* Disable auto refresh before proceeding with calibration */ in mmdc_do_dqs_calibration()
307 * Check MDMISC register CALIB_PER_CS to see which CS calibration in mmdc_do_dqs_calibration()
309 * as this is the default value, indicating calibration is directed in mmdc_do_dqs_calibration()
311 * Disable the other chip select not being target for calibration in mmdc_do_dqs_calibration()
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| /openbmc/openbmc/meta-facebook/meta-bletchley/recipes-phosphor/state/phosphor-state-manager/ |
| H A D | host-powerreset@.service | 3 Requires=motor-init-calibration@%i.service
4 After=motor-init-calibration@%i.service
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| H A D | host-powercycle@.service | 3 Requires=motor-init-calibration@%i.service
4 After=motor-init-calibration@%i.service
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| H A D | host-poweroff@.service | 3 Requires=motor-init-calibration@%i.service
4 After=motor-init-calibration@%i.service
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| H A D | chassis-poweron@.service | 3 Requires=motor-init-calibration@%i.service
4 After=motor-init-calibration@%i.service
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| H A D | host-poweron@.service | 3 Requires=motor-init-calibration@%i.service
4 After=motor-init-calibration@%i.service
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| /openbmc/u-boot/board/freescale/mx6qarm2/ |
| H A D | imximage_mx6dl.cfg | 152 /* Calibration setup. */
153 /* DDR_PHY_P0_MPZQHWCTRL, enable on time ZQ calibration */
192 * a. DQS gating is not relevant for LPDDR2. DSQ gating calibration section
193 * should be skipped, or the write/read calibration comming after that
195 * b. The calibration code that runs for both MMDC0 & MMDC1 should be used.
219 /* Calibration setup end */
312 * calibration values based on calibration compare of 0x00ffff00:
313 * Note, these calibration values are based on Freescale's board
314 * May need to run calibration on target board to fine tune these
317 /* DDR_PHY_P0_MPZQHWCTRL, enable automatic ZQ calibration */
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| /openbmc/openbmc/meta-facebook/meta-bletchley/recipes-bletchley/detect-gpio-present/files/ |
| H A D | bletchley-sled-insertion@.target | 6 Requires=motor-init-calibration@%i.service
7 After=motor-init-calibration@%i.service
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| /openbmc/u-boot/board/freescale/mx6memcal/ |
| H A D | spl.c | 231 .pd_fast_exit = 0, /* immaterial for calibration */
236 .pd_fast_exit = 0, /* immaterial for calibration */
397 struct mx6_mmdc_calibration calibration = {0}; in board_init_f() local
401 /* write leveling calibration defaults */ in board_init_f()
402 calibration.p0_mpwrdlctl = 0x40404040; in board_init_f()
403 calibration.p1_mpwrdlctl = 0x40404040; in board_init_f()
440 mx6_dram_cfg(&sysinfo, &calibration, &ddrtype); in board_init_f()
444 printf("error %d from write level calibration\n", errs); in board_init_f()
448 printf("error %d from dqs calibration\n", errs); in board_init_f()
451 mmdc_read_calibration(&sysinfo, &calibration); in board_init_f()
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| /openbmc/u-boot/board/bachmann/ot1200/ |
| H A D | ot1200_spl.c | 105 /* write leveling calibration determine */
110 /* Read DQS Gating calibration */
115 /* Read Calibration: DQS delay relative to DQ read access */
118 /* Write Calibration: DQ/DM delay relative to DQS write access */
149 /* configure MMDC for SDRAM width/size and per-model calibration */ in board_init_f()
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| /openbmc/openbmc/poky/meta/recipes-graphics/xinput-calibrator/ |
| H A D | pointercal-xinput_0.0.bb | 1 SUMMARY = "Touchscreen calibration data from xinput-calibrator"
2 DESCRIPTION = "A generic touchscreen calibration program for X.Org"
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| /openbmc/u-boot/board/ge/bx50v3/ |
| H A D | bx50v3.cfg | 70 /* Read DQS Gating calibration */
75 /* Read calibration */
78 /* Write calibration */
91 /* Complete calibration by forced measurment */
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| /openbmc/openbmc/meta-raspberrypi/recipes-graphics/xorg-xserver/ |
| H A D | xserver-xf86-config_%.bbappend | 5 file://xorg.conf.d/99-calibration.conf \
12 … install -m 0644 ${UNPACKDIR}/xorg.conf.d/99-calibration.conf ${D}/${sysconfdir}/X11/xorg.conf.d/
|