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Searched full:cpuwait (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/misc/
H A Diotkit-sysctl.c50 REG32(CPUWAIT, 0x118)
192 r = s->cpuwait; in iotkit_sysctl_read()
224 /* In SSE300 this offset is CPUWAIT */ in iotkit_sysctl_read()
225 r = s->cpuwait; in iotkit_sysctl_read()
375 if ((s->cpuwait & mask) && !(value & mask)) { in cpuwait_write()
380 s->cpuwait = value; in cpuwait_write()
460 /* In SSE300 this offset is CPUWAIT */ in iotkit_sysctl_write()
729 s->cpuwait = s->cpuwait_rst; in iotkit_sysctl_reset()
827 VMSTATE_UINT32(cpuwait, IoTKitSysCtl),
/openbmc/qemu/include/hw/misc/
H A Diotkit-sysctl.h47 uint32_t cpuwait; member
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml78 Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/
H A D0001-remoteproc-Add-Arm-remoteproc-driver.patch177 + /* CPUWAIT signal of the External System is de-asserted */
/openbmc/qemu/hw/arm/
H A Darmsse.c1016 * CPUs start powered down if the corresponding bit in the CPUWAIT in armsse_realize()
1017 * register is 1. In real hardware the CPUWAIT register reset value is in armsse_realize()