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Searched full:clk_top_vcodecpll_370p5 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,vcodec-decoder.yaml181 <&topckgen CLK_TOP_VCODECPLL_370P5>;
195 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
H A Dmediatek,vcodec-encoder.yaml184 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
/openbmc/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h86 #define CLK_TOP_VCODECPLL_370P5 75 macro
H A Dmt8173-clk.h88 #define CLK_TOP_VCODECPLL_370P5 78 macro
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1403 <&topckgen CLK_TOP_VCODECPLL_370P5>;
1417 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
1519 <&topckgen CLK_TOP_VCODECPLL_370P5>;
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c443 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),
H A Dclk-mt8173-topckgen.c522 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),