/openbmc/linux/Documentation/devicetree/bindings/ata/ |
H A D | allwinner,sun8i-r40-ahci.yaml | 60 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | exynos5250.h | 81 #define CLK_SATA 277 macro
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H A D | sun9i-a80-ccu.h | 101 #define CLK_SATA 75 macro
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H A D | sun8i-r40-ccu.h | 147 #define CLK_SATA 123 macro
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H A D | sun4i-a10-ccu.h | 153 #define CLK_SATA 122 macro
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H A D | exynos4.h | 140 #define CLK_SATA 302 /* Exynos4210 only */ macro
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/openbmc/u-boot/include/dt-bindings/clock/ |
H A D | sun9i-a80-ccu.h | 101 #define CLK_SATA 75 macro
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H A D | sun8i-r40-ccu.h | 143 #define CLK_SATA 123 macro
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H A D | sun4i-a10-ccu.h | 153 #define CLK_SATA 122 macro
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/openbmc/linux/drivers/clk/hisilicon/ |
H A D | clk-hix5hd2.c | 161 {"clk_sata", NULL, HIX5HD2_SATA_CLK,
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/openbmc/linux/drivers/clk/sunxi-ng/ |
H A D | ccu-sun4i-a10.c | 1166 [CLK_SATA] = &sata_clk.common.hw, 1332 [CLK_SATA] = &sata_clk.common.hw,
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H A D | ccu-sun9i-a80.c | 1047 [CLK_SATA] = &sata_clk.common.hw,
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H A D | ccu-sun8i-r40.c | 1118 [CLK_SATA] = &sata_clk.common.hw,
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/openbmc/u-boot/arch/arm/dts/ |
H A D | sun4i-a10.dtsi | 558 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
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H A D | sun7i-a20.dtsi | 638 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
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/openbmc/linux/drivers/clk/samsung/ |
H A D | clk-exynos5250.c | 561 GATE(CLK_SATA, "sata", "div_aclk200", GATE_IP_FSYS, 6, 0, 0),
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H A D | clk-exynos4.c | 930 GATE(CLK_SATA, "sata", "aclk133", GATE_IP_FSYS, 10, 0, 0),
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5250.dtsi | 398 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
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/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun4i-a10.dtsi | 602 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
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H A D | sun8i-r40.dtsi | 457 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
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H A D | sun7i-a20.dtsi | 709 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
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