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/openbmc/linux/drivers/iio/light/
H A Drohm-bu27034.c228 u16 ch1; member
672 * => 115.7400832 * ch1 / gain1 / mt -
674 * 0.00012213 * 25600 * (ch1 / gain1 / mt) * 25600 *
675 * (ch1 /gain1 / mt) / (25600 * ch0 / gain0 / mt)
677 * A = 0.00012213 * 25600 * (ch1 /gain1 / mt) * 25600 *
678 * (ch1 /gain1 / mt) / (25600 * ch0 / gain0 / mt)
679 * => 0.00012213 * 25600 * (ch1 /gain1 / mt) *
680 * (ch1 /gain1 / mt) / (ch0 / gain0 / mt)
681 * => 0.00012213 * 25600 * (ch1 / gain1) * (ch1 /gain1 / mt) /
683 * => 0.00012213 * 25600 * (ch1 / gain1) * (ch1 /gain1 / mt) *
[all …]
H A Dapds9300.c57 /* Calculated values 1000 * (CH1/CH0)^1.4 for CH1/CH0 from 0 to 0.52 */
65 static unsigned long apds9300_calculate_lux(u16 ch0, u16 ch1) in apds9300_calculate_lux() argument
73 tmp = DIV_ROUND_UP(ch1 * 100, ch0); in apds9300_calculate_lux()
78 lux = 2290 * ch0 - 2910 * ch1; in apds9300_calculate_lux()
80 lux = 1570 * ch0 - 1800 * ch1; in apds9300_calculate_lux()
82 lux = 338 * ch0 - 260 * ch1; in apds9300_calculate_lux()
239 int ch0, ch1, ret = -EINVAL; in apds9300_read_raw() local
250 ch1 = apds9300_get_adc_val(data, 1); in apds9300_read_raw()
251 if (ch1 < 0) { in apds9300_read_raw()
252 ret = ch1; in apds9300_read_raw()
[all …]
H A Dtsl2583.c71 unsigned int ch1; member
109 s16 ch1; member
152 * The raw ch0 and ch1 values of the ambient light sensed in the last
157 * of ch1 value, to the ch0 value, is calculated. The array als_device_lux[]
159 * above the ratio we just calculated. The ch0 and ch1 multiplier constants in
165 u16 ch0, ch1; /* separated ch0/ch1 data from device */ in tsl2583_get_lux() local
217 ch1 = le16_to_cpup((const __le16 *)&buf[2]); in tsl2583_get_lux()
220 chip->als_cur_info.als_ch1 = ch1; in tsl2583_get_lux()
222 if ((ch0 >= chip->als_saturation) || (ch1 >= chip->als_saturation)) in tsl2583_get_lux()
237 ratio = (ch1 << 15) / ch0; in tsl2583_get_lux()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dtas571x.c489 BIQUAD_COEFS("CH1 - Biquad 0", TAS5707_CH1_BQ0_REG),
490 BIQUAD_COEFS("CH1 - Biquad 1", TAS5707_CH1_BQ1_REG),
491 BIQUAD_COEFS("CH1 - Biquad 2", TAS5707_CH1_BQ2_REG),
492 BIQUAD_COEFS("CH1 - Biquad 3", TAS5707_CH1_BQ3_REG),
493 BIQUAD_COEFS("CH1 - Biquad 4", TAS5707_CH1_BQ4_REG),
494 BIQUAD_COEFS("CH1 - Biquad 5", TAS5707_CH1_BQ5_REG),
495 BIQUAD_COEFS("CH1 - Biquad 6", TAS5707_CH1_BQ6_REG),
575 SOC_DOUBLE_R_RANGE("CH1 Mixer Volume",
590 BIQUAD_COEFS("CH1 - Biquad 0", TAS5717_CH1_BQ0_REG),
591 BIQUAD_COEFS("CH1 - Biquad 1", TAS5717_CH1_BQ1_REG),
[all …]
H A Dnau8540.c231 SOC_DAPM_ENUM("Digital CH1 Select", digital_ch1_enum);
295 SND_SOC_DAPM_PGA("ADC CH1", NAU8540_REG_ANALOG_PWR, 0, 0, NULL, 0),
306 SND_SOC_DAPM_MUX("Digital CH1 Mux",
324 {"ADC CH1", NULL, "ADC1"},
334 {"Digital CH1 Mux", "ADC channel 1", "ADC CH1"},
335 {"Digital CH1 Mux", "ADC channel 2", "ADC CH2"},
336 {"Digital CH1 Mux", "ADC channel 3", "ADC CH3"},
337 {"Digital CH1 Mux", "ADC channel 4", "ADC CH4"},
339 {"Digital CH2 Mux", "ADC channel 1", "ADC CH1"},
344 {"Digital CH3 Mux", "ADC channel 1", "ADC CH1"},
[all …]
H A Dsta350.c442 SOC_SINGLE_TLV("Ch1 Volume", STA350_C1VOL, 0, 0xff, 1, chvol_tlv),
467 SOC_SINGLE("Ch1 Switch", STA350_MMUTE, STA350_MMUTE_C1M_SHIFT, 1, 1),
474 SOC_SINGLE("Ch1 Tone Control Bypass Switch",
478 SOC_SINGLE("Ch1 EQ Bypass Switch",
482 SOC_SINGLE("Ch1 Master Volume Bypass Switch",
488 SOC_ENUM("Ch1 Binary Output Select", sta350_binary_output_ch1_enum),
491 SOC_ENUM("Ch1 Limiter Select", sta350_limiter_ch1_enum),
533 BIQUAD_COEFS("Ch1 - Biquad 1", 0),
534 BIQUAD_COEFS("Ch1 - Biquad 2", 5),
535 BIQUAD_COEFS("Ch1 - Biquad 3", 10),
[all …]
H A Dsta32x.c447 SOC_SINGLE("Ch1 Switch", STA32X_MMUTE, 1, 1, 1),
450 SOC_SINGLE_TLV("Ch1 Volume", STA32X_C1VOL, 0, 0xff, 1, chvol_tlv),
463 SOC_SINGLE("Ch1 Tone Control Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_TCB_SHIFT, 1, 0),
465 SOC_SINGLE("Ch1 EQ Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_EQBP_SHIFT, 1, 0),
467 SOC_SINGLE("Ch1 Master Volume Bypass Switch", STA32X_C1CFG, STA32X_CxCFG_VBP_SHIFT, 1, 0),
470 SOC_ENUM("Ch1 Limiter Select", sta32x_limiter_ch1_enum),
500 BIQUAD_COEFS("Ch1 - Biquad 1", 0),
501 BIQUAD_COEFS("Ch1 - Biquad 2", 5),
502 BIQUAD_COEFS("Ch1 - Biquad 3", 10),
503 BIQUAD_COEFS("Ch1 - Biquad 4", 15),
[all …]
H A Dak5558.c108 SND_SOC_DAPM_ADC("ADC Ch1", NULL, AK5558_00_POWER_MANAGEMENT1, 0, 0),
125 SND_SOC_DAPM_ADC("ADC Ch1", NULL, AK5558_00_POWER_MANAGEMENT1, 0, 0),
132 {"ADC Ch1", NULL, "AIN1"},
133 {"SDTO", NULL, "ADC Ch1"},
158 {"ADC Ch1", NULL, "AIN1"},
159 {"SDTO", NULL, "ADC Ch1"},
/openbmc/linux/drivers/accessibility/speakup/
H A Dkeyhelp.c51 u_char *kp, counters[MAXFUNCS], ch, ch1; in build_key_data() local
84 ch1 = *kp++; in build_key_data()
85 if (!ch1) in build_key_data()
87 if ((state_tbl[i] & 16) != 0 && ch1 == SPK_KEY) in build_key_data()
90 counters[ch1]--; in build_key_data()
91 offset = key_offsets[ch1]; in build_key_data()
94 p_key = key_data + offset + counters[ch1]; in build_key_data()
/openbmc/u-boot/board/renesas/sh7757lcr/
H A DREADME.sh7757lcr47 write_mac [ETHERC ch0] [ETHERC ch1] [GETHERC ch0] [GETHERC ch1]
62 ETHERC ch1 = 00:00:87:6c:21:81
64 GETHERC ch1 = 00:00:87:6c:21:83
/openbmc/linux/drivers/media/usb/pvrusb2/
H A Dpvrusb2-context.c103 struct pvr2_channel *ch1, *ch2; in pvr2_context_check() local
130 for (ch1 = mp->mc_first; ch1; ch1 = ch2) { in pvr2_context_check()
131 ch2 = ch1->mc_next; in pvr2_context_check()
132 if (ch1->check_func) ch1->check_func(ch1); in pvr2_context_check()
/openbmc/linux/sound/pci/ice1712/
H A Dse.c24 unsigned char ch1, ch2; member
450 uc->value.integer.value[0] = spec->vol[n].ch1; in se200pci_cont_volume_get()
461 uc->value.integer.value[0] = spec->vol[n].ch1; in se200pci_cont_boolean_get()
471 uc->value.enumerated.item[0] = spec->vol[n].ch1; in se200pci_cont_enum_get()
482 spec->vol[n].ch1, in se200pci_cont_update()
488 spec->vol[n].ch1, in se200pci_cont_update()
494 spec->vol[n].ch1, in se200pci_cont_update()
500 spec->vol[n].ch1); in se200pci_cont_update()
504 se200pci_WM8776_set_agc(ice, spec->vol[n].ch1); in se200pci_cont_update()
508 se200pci_WM8776_set_afl(ice, spec->vol[n].ch1); in se200pci_cont_update()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun4i-a10-tcon-ch0-clk.yaml25 - allwinner,sun4i-a10-tcon-ch1-clk
71 compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
74 clock-output-names = "tcon-ch1-sclk";
/openbmc/linux/drivers/counter/
H A Drz-mtu3-cnt.c395 struct rz_mtu3_channel *const ch1 = rz_mtu3_get_ch(counter, 0); in rz_mtu3_32bit_cnt_setting() local
399 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TMDR1, RZ_MTU3_TMDR1_PH_CNT_MODE_1); in rz_mtu3_32bit_cnt_setting()
401 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TCR, RZ_MTU3_TCR_CCLR_TGRA); in rz_mtu3_32bit_cnt_setting()
402 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TIOR, RZ_MTU3_TIOR_IC_BOTH); in rz_mtu3_32bit_cnt_setting()
404 rz_mtu3_enable(ch1); in rz_mtu3_32bit_cnt_setting()
423 struct rz_mtu3_channel *const ch1 = rz_mtu3_get_ch(counter, 0); in rz_mtu3_initialize_counter() local
439 if (!rz_mtu3_request_channel(ch1)) in rz_mtu3_initialize_counter()
443 rz_mtu3_release_channel(ch1); in rz_mtu3_initialize_counter()
458 struct rz_mtu3_channel *const ch1 = rz_mtu3_get_ch(counter, 0); in rz_mtu3_terminate_counter() local
463 rz_mtu3_release_channel(ch1); in rz_mtu3_terminate_counter()
[all …]
/openbmc/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-dai-tdm.c145 "CH0", "CH1", "CH2", "CH3",
348 {"HDMI_CH0_MUX", "CH1", "HDMI"},
357 {"HDMI_CH1_MUX", "CH1", "HDMI"},
366 {"HDMI_CH2_MUX", "CH1", "HDMI"},
375 {"HDMI_CH3_MUX", "CH1", "HDMI"},
384 {"HDMI_CH4_MUX", "CH1", "HDMI"},
393 {"HDMI_CH5_MUX", "CH1", "HDMI"},
402 {"HDMI_CH6_MUX", "CH1", "HDMI"},
411 {"HDMI_CH7_MUX", "CH1", "HDMI"},
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dmemconf.c58 /* set up ch1 */ in __uniphier_memconf_init()
69 pr_err("error: unsupported DRAM ch1 width\n"); in __uniphier_memconf_init()
90 pr_err("error: unsupported DRAM ch1 size\n"); in __uniphier_memconf_init()
H A Dsc-regs.h61 #define SC_RSTCTRL4_NRST_UMCA1 (0x1 << 9) /* UMC ch1 standby */
64 #define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */
86 #define SC_CLKCTRL4_CEN_UMC1 (0x1 << 1) /* UMC ch1 */
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra186-mc.yaml157 - const: ch1
176 - const: ch1
207 - const: ch1
250 reg-names = "sid", "broadcast", "ch0", "ch1", "ch2", "ch3";
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-tdm.c137 "CH0", "CH1", "CH2", "CH3",
396 {"HDMI_CH0_MUX", "CH1", "HDMI"},
405 {"HDMI_CH1_MUX", "CH1", "HDMI"},
414 {"HDMI_CH2_MUX", "CH1", "HDMI"},
423 {"HDMI_CH3_MUX", "CH1", "HDMI"},
432 {"HDMI_CH4_MUX", "CH1", "HDMI"},
441 {"HDMI_CH5_MUX", "CH1", "HDMI"},
450 {"HDMI_CH6_MUX", "CH1", "HDMI"},
459 {"HDMI_CH7_MUX", "CH1", "HDMI"},
/openbmc/linux/include/linux/usb/
H A Dr8a66597.h440 #define CH1STCLR 0x0002 /* b2: Ch1 DMA Status Clear */
444 #define CH1BUFW 0x0200 /* b9: Ch1 DMA Buffer Data Transfer Enable */
446 #define CH1BUFS 0x0002 /* b2: Ch1 DMA Buffer Data Status */
450 #define CH1ERRE 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Enable */
452 #define CH1ENDE 0x0002 /* b2: Ch1 DMA Transfer End Int Enable */
456 #define CH1ERRS 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Status */
458 #define CH1ENDS 0x0002 /* b2: Ch1 DMA Transfer End Int Status */
462 #define CH1ERRC 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Stat Clear */
464 #define CH1ENDC 0x0002 /* b2: Ch1 DMA Transfer End Int Stat Clear */
/openbmc/linux/drivers/usb/renesas_usbhs/
H A Drza.c21 /* Input Clock Selection (NOTE: ch0 controls both ch0 and ch1) */ in usbhs_rza1_hardware_init()
40 /* Enable USB PLL (NOTE: ch0 controls both ch0 and ch1) */ in usbhs_rza1_hardware_init()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Daudio-iio-aux.yaml61 io-channel-names = "CH0", "CH1", "CH2", "CH3";
62 /* Invert CH1 and CH2 */
/openbmc/linux/tools/perf/tests/
H A Dapi-io.c132 __u64 val1, int ch1, in do_test_get_hex() argument
147 EXPECT_EQUAL(ch, ch1); in do_test_get_hex()
213 __u64 val1, int ch1, in do_test_get_dec() argument
228 EXPECT_EQUAL(ch, ch1); in do_test_get_dec()
/openbmc/linux/drivers/misc/
H A Dtsl2550.c143 static int tsl2550_calculate_lux(u8 ch0, u8 ch1) in tsl2550_calculate_lux() argument
149 u16 c1 = count_lut[ch1]; in tsl2550_calculate_lux()
245 u8 ch0, ch1; in __tsl2550_show_lux() local
256 ch1 = ret; in __tsl2550_show_lux()
259 ret = tsl2550_calculate_lux(ch0, ch1); in __tsl2550_show_lux()
/openbmc/linux/drivers/gpu/drm/i915/soc/
H A Dintel_dram.c327 const struct dram_channel_info *ch1) in intel_is_dram_symmetric() argument
329 return !memcmp(ch0, ch1, sizeof(*ch0)) && in intel_is_dram_symmetric()
338 struct dram_channel_info ch0 = {}, ch1 = {}; in skl_dram_get_channels_info() local
350 ret = skl_dram_get_channel_info(i915, &ch1, 1, val); in skl_dram_get_channels_info()
359 if (ch0.ranks == 0 && ch1.ranks == 0) { in skl_dram_get_channels_info()
364 dram_info->wm_lv_0_adjust_needed = ch0.is_16gb_dimm || ch1.is_16gb_dimm; in skl_dram_get_channels_info()
366 dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1); in skl_dram_get_channels_info()

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