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/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_context.h22 #define CE_TRACE(ce, fmt, ...) do { \ argument
23 const struct intel_context *ce__ = (ce); \
33 void intel_context_init(struct intel_context *ce,
35 void intel_context_fini(struct intel_context *ce);
43 int intel_context_alloc_state(struct intel_context *ce);
45 void intel_context_free(struct intel_context *ce);
47 int intel_context_reconfigure_sseu(struct intel_context *ce,
52 static inline bool intel_context_is_child(struct intel_context *ce) in intel_context_is_child() argument
54 return !!ce->parallel.parent; in intel_context_is_child()
57 static inline bool intel_context_is_parent(struct intel_context *ce) in intel_context_is_parent() argument
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H A Dintel_context.c26 struct intel_context *ce = container_of(rcu, typeof(*ce), rcu); in rcu_context_free() local
28 trace_intel_context_free(ce); in rcu_context_free()
29 kmem_cache_free(slab_ce, ce); in rcu_context_free()
32 void intel_context_free(struct intel_context *ce) in intel_context_free() argument
34 call_rcu(&ce->rcu, rcu_context_free); in intel_context_free()
40 struct intel_context *ce; in intel_context_create() local
42 ce = intel_context_alloc(); in intel_context_create()
43 if (!ce) in intel_context_create()
46 intel_context_init(ce, engine); in intel_context_create()
47 trace_intel_context_create(ce); in intel_context_create()
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H A Dintel_lrc.h36 int lrc_alloc(struct intel_context *ce,
38 void lrc_reset(struct intel_context *ce);
39 void lrc_fini(struct intel_context *ce);
43 lrc_pre_pin(struct intel_context *ce,
48 lrc_pin(struct intel_context *ce,
51 void lrc_unpin(struct intel_context *ce);
52 void lrc_post_unpin(struct intel_context *ce);
54 void lrc_init_state(struct intel_context *ce,
58 void lrc_init_regs(const struct intel_context *ce,
61 void lrc_reset_regs(const struct intel_context *ce,
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H A Dintel_lrc.c849 const struct intel_context *ce, in init_common_regs() argument
865 regs[CTX_TIMESTAMP] = ce->stats.runtime.last; in init_common_regs()
929 const struct intel_context *ce, in __lrc_init_regs() argument
949 init_common_regs(regs, ce, engine, inhibit); in __lrc_init_regs()
950 init_ppgtt_regs(regs, vm_alias(ce->vm)); in __lrc_init_regs()
957 void lrc_init_regs(const struct intel_context *ce, in lrc_init_regs() argument
961 __lrc_init_regs(ce->lrc_reg_state, ce, engine, inhibit); in lrc_init_regs()
964 void lrc_reset_regs(const struct intel_context *ce, in lrc_reset_regs() argument
967 __reset_stop_ring(ce->lrc_reg_state, engine); in lrc_reset_regs()
995 static u32 context_wa_bb_offset(const struct intel_context *ce) in context_wa_bb_offset() argument
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H A Dselftest_mocs.c26 struct intel_context *ce; in mocs_context_create() local
28 ce = intel_context_create(engine); in mocs_context_create()
29 if (IS_ERR(ce)) in mocs_context_create()
30 return ce; in mocs_context_create()
33 ce->ring_size = SZ_16K; in mocs_context_create()
35 return ce; in mocs_context_create()
218 struct intel_context *ce) in check_mocs_engine() argument
228 rq = intel_context_create_request(ce); in check_mocs_engine()
238 if (!err && ce->engine->class == RENDER_CLASS) in check_mocs_engine()
250 err = check_mocs_table(ce->engine, arg->mocs, &vaddr); in check_mocs_engine()
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H A Dintel_context_sseu.c17 const struct intel_context *ce, in gen8_emit_rpcs_config() argument
27 offset = i915_ggtt_offset(ce->state) + in gen8_emit_rpcs_config()
41 gen8_modify_rpcs(struct intel_context *ce, const struct intel_sseu sseu) in gen8_modify_rpcs() argument
46 lockdep_assert_held(&ce->pin_mutex); in gen8_modify_rpcs()
54 if (!intel_context_pin_if_active(ce)) in gen8_modify_rpcs()
57 rq = intel_engine_create_kernel_request(ce->engine); in gen8_modify_rpcs()
64 ret = intel_context_prepare_remote_request(ce, rq); in gen8_modify_rpcs()
66 ret = gen8_emit_rpcs_config(rq, ce, sseu); in gen8_modify_rpcs()
70 intel_context_unpin(ce); in gen8_modify_rpcs()
75 intel_context_reconfigure_sseu(struct intel_context *ce, in intel_context_reconfigure_sseu() argument
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/openbmc/linux/drivers/crypto/gemini/
H A Dsl3516-ce-core.c3 * sl3516-ce-core.c - hardware cryptographic offloader for Storlink SL3516 SoC
28 #include "sl3516-ce.h"
30 static int sl3516_ce_desc_init(struct sl3516_ce_dev *ce) in sl3516_ce_desc_init() argument
35 ce->tx = dma_alloc_coherent(ce->dev, sz, &ce->dtx, GFP_KERNEL); in sl3516_ce_desc_init()
36 if (!ce->tx) in sl3516_ce_desc_init()
38 ce->rx = dma_alloc_coherent(ce->dev, sz, &ce->drx, GFP_KERNEL); in sl3516_ce_desc_init()
39 if (!ce->rx) in sl3516_ce_desc_init()
43 ce->tx[i].frame_ctrl.bits.own = CE_CPU; in sl3516_ce_desc_init()
44 ce->tx[i].next_desc.next_descriptor = ce->dtx + (i + 1) * sizeof(struct descriptor); in sl3516_ce_desc_init()
46 ce->tx[MAXDESC - 1].next_desc.next_descriptor = ce->dtx; in sl3516_ce_desc_init()
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H A Dsl3516-ce-rng.c3 * sl3516-ce-rng.c - hardware cryptographic offloader for SL3516 SoC.
9 #include "sl3516-ce.h"
15 struct sl3516_ce_dev *ce; in sl3516_ce_rng_read() local
20 ce = container_of(rng, struct sl3516_ce_dev, trng); in sl3516_ce_rng_read()
23 ce->hwrng_stat_req++; in sl3516_ce_rng_read()
24 ce->hwrng_stat_bytes += max; in sl3516_ce_rng_read()
27 err = pm_runtime_get_sync(ce->dev); in sl3516_ce_rng_read()
29 pm_runtime_put_noidle(ce->dev); in sl3516_ce_rng_read()
34 *data = readl(ce->base + IPSEC_RAND_NUM_REG); in sl3516_ce_rng_read()
39 pm_runtime_put(ce->dev); in sl3516_ce_rng_read()
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H A Dsl3516-ce-cipher.c3 * sl3516-ce-cipher.c - hardware cryptographic offloader for Storlink SL3516 SoC
22 #include "sl3516-ce.h"
24 /* sl3516_ce_need_fallback - check if a request can be handled by the CE */
29 struct sl3516_ce_dev *ce = op->ce; in sl3516_ce_need_fallback() local
35 ce->fallback_mod16++; in sl3516_ce_need_fallback()
44 ce->fallback_sg_count_tx++; in sl3516_ce_need_fallback()
49 ce->fallback_sg_count_rx++; in sl3516_ce_need_fallback()
56 ce->fallback_mod16++; in sl3516_ce_need_fallback()
60 ce->fallback_mod16++; in sl3516_ce_need_fallback()
64 ce->fallback_align16++; in sl3516_ce_need_fallback()
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/openbmc/linux/arch/arm64/crypto/
H A DMakefile8 obj-$(CONFIG_CRYPTO_SHA1_ARM64_CE) += sha1-ce.o
9 sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o
11 obj-$(CONFIG_CRYPTO_SHA2_ARM64_CE) += sha2-ce.o
12 sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o
14 obj-$(CONFIG_CRYPTO_SHA512_ARM64_CE) += sha512-ce.o
15 sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o
17 obj-$(CONFIG_CRYPTO_SHA3_ARM64) += sha3-ce.o
18 sha3-ce-y := sha3-ce-glue.o sha3-ce-core.o
23 obj-$(CONFIG_CRYPTO_SM3_ARM64_CE) += sm3-ce.o
24 sm3-ce-y := sm3-ce-glue.o sm3-ce-core.o
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/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_submission.c111 * ce->guc_state.lock
112 * Protects everything under ce->guc_state. Ensures that a context is in the
120 * sched_engine->lock -> ce->guc_state.lock
121 * guc->submission_state.lock -> ce->guc_state.lock
180 static inline void init_sched_state(struct intel_context *ce) in init_sched_state() argument
182 lockdep_assert_held(&ce->guc_state.lock); in init_sched_state()
183 ce->guc_state.sched_state &= SCHED_STATE_BLOCKED_MASK; in init_sched_state()
197 static bool sched_state_is_init(struct intel_context *ce) in sched_state_is_init() argument
199 return !(ce->guc_state.sched_state & ~SCHED_STATE_VALID_INIT); in sched_state_is_init()
203 context_wait_for_deregister_to_register(struct intel_context *ce) in context_wait_for_deregister_to_register() argument
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H A Dselftest_guc.c23 static struct i915_request *nop_user_request(struct intel_context *ce, in nop_user_request() argument
29 rq = intel_context_create_request(ce); in nop_user_request()
57 struct intel_context *ce; in intel_guc_scrub_ctbs() local
67 ce = intel_context_create(engine); in intel_guc_scrub_ctbs()
68 if (IS_ERR(ce)) { in intel_guc_scrub_ctbs()
69 ret = PTR_ERR(ce); in intel_guc_scrub_ctbs()
70 gt_err(gt, "Failed to create context %d: %pe\n", i, ce); in intel_guc_scrub_ctbs()
76 ce->drop_schedule_enable = true; in intel_guc_scrub_ctbs()
79 ce->drop_schedule_disable = true; in intel_guc_scrub_ctbs()
82 ce->drop_deregister = true; in intel_guc_scrub_ctbs()
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/openbmc/linux/drivers/crypto/allwinner/sun8i-ce/
H A Dsun8i-ce-core.c3 * sun8i-ce-core.c - hardware cryptographic offloader for
31 #include "sun8i-ce.h"
153 int sun8i_ce_get_engine_number(struct sun8i_ce_dev *ce) in sun8i_ce_get_engine_number() argument
155 return atomic_inc_return(&ce->flow) % (MAXFLOW - 1); in sun8i_ce_get_engine_number()
158 int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name) in sun8i_ce_run_task() argument
162 struct ce_task *cet = ce->chanlist[flow].tl; in sun8i_ce_run_task()
165 ce->chanlist[flow].stat_req++; in sun8i_ce_run_task()
168 mutex_lock(&ce->mlock); in sun8i_ce_run_task()
170 v = readl(ce->base + CE_ICR); in sun8i_ce_run_task()
172 writel(v, ce->base + CE_ICR); in sun8i_ce_run_task()
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H A Dsun8i-ce-trng.c3 * sun8i-ce-trng.c - hardware cryptographic offloader for
12 #include "sun8i-ce.h"
25 struct sun8i_ce_dev *ce; in sun8i_ce_trng_read() local
35 ce = container_of(rng, struct sun8i_ce_dev, trng); in sun8i_ce_trng_read()
46 ce->hwrng_stat_req++; in sun8i_ce_trng_read()
47 ce->hwrng_stat_bytes += todo; in sun8i_ce_trng_read()
50 dma_dst = dma_map_single(ce->dev, d, todo, DMA_FROM_DEVICE); in sun8i_ce_trng_read()
51 if (dma_mapping_error(ce->dev, dma_dst)) { in sun8i_ce_trng_read()
52 dev_err(ce->dev, "Cannot DMA MAP DST\n"); in sun8i_ce_trng_read()
57 err = pm_runtime_resume_and_get(ce->dev); in sun8i_ce_trng_read()
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H A Dsun8i-ce-prng.c3 * sun8i-ce-prng.c - hardware cryptographic offloader for
12 #include "sun8i-ce.h"
61 struct sun8i_ce_dev *ce; in sun8i_ce_prng_generate() local
72 ce = algt->ce; in sun8i_ce_prng_generate()
75 dev_err(ce->dev, "not seeded\n"); in sun8i_ce_prng_generate()
89 dev_dbg(ce->dev, "%s PRNG slen=%u dlen=%u todo=%u multi=%u\n", __func__, in sun8i_ce_prng_generate()
97 dma_iv = dma_map_single(ce->dev, ctx->seed, ctx->slen, DMA_TO_DEVICE); in sun8i_ce_prng_generate()
98 if (dma_mapping_error(ce->dev, dma_iv)) { in sun8i_ce_prng_generate()
99 dev_err(ce->dev, "Cannot DMA MAP IV\n"); in sun8i_ce_prng_generate()
104 dma_dst = dma_map_single(ce->dev, d, todo, DMA_FROM_DEVICE); in sun8i_ce_prng_generate()
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H A Dsun8i-ce-cipher.c3 * sun8i-ce-cipher.c - hardware cryptographic offloader for
22 #include "sun8i-ce.h"
125 struct sun8i_ce_dev *ce = op->ce; in sun8i_ce_cipher_prepare() local
143 dev_dbg(ce->dev, "%s %s %u %x IV(%p %u) key=%u\n", __func__, in sun8i_ce_cipher_prepare()
155 chan = &ce->chanlist[flow]; in sun8i_ce_cipher_prepare()
161 common = ce->variant->alg_cipher[algt->ce_algo_id]; in sun8i_ce_cipher_prepare()
164 /* CTS and recent CE (H6) need length in bytes, in word otherwise */ in sun8i_ce_cipher_prepare()
165 if (ce->variant->cipher_t_dlen_in_bytes) in sun8i_ce_cipher_prepare()
170 sym = ce->variant->op_mode[algt->ce_blockmode]; in sun8i_ce_cipher_prepare()
187 rctx->addr_key = dma_map_single(ce->dev, op->key, op->keylen, DMA_TO_DEVICE); in sun8i_ce_cipher_prepare()
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/openbmc/linux/fs/smb/client/
H A Ddfs_cache.c108 static inline bool cache_entry_expired(const struct cache_entry *ce) in cache_entry_expired() argument
113 return timespec64_compare(&ts, &ce->etime) >= 0; in cache_entry_expired()
116 static inline void free_tgts(struct cache_entry *ce) in free_tgts() argument
120 list_for_each_entry_safe(t, n, &ce->tlist, list) { in free_tgts()
127 static inline void flush_cache_ent(struct cache_entry *ce) in flush_cache_ent() argument
129 hlist_del_init(&ce->hlist); in flush_cache_ent()
130 kfree(ce->path); in flush_cache_ent()
131 free_tgts(ce); in flush_cache_ent()
133 kmem_cache_free(cache_slab, ce); in flush_cache_ent()
143 struct cache_entry *ce; in flush_cache_ents() local
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/openbmc/linux/drivers/clocksource/
H A Dtimer-sun5i.c58 static void sun5i_clkevt_sync(struct sun5i_timer *ce) in sun5i_clkevt_sync() argument
60 u32 old = readl(ce->base + TIMER_CNTVAL_LO_REG(1)); in sun5i_clkevt_sync()
62 while ((old - readl(ce->base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS) in sun5i_clkevt_sync()
66 static void sun5i_clkevt_time_stop(struct sun5i_timer *ce, u8 timer) in sun5i_clkevt_time_stop() argument
68 u32 val = readl(ce->base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()
69 writel(val & ~TIMER_CTL_ENABLE, ce->base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()
71 sun5i_clkevt_sync(ce); in sun5i_clkevt_time_stop()
74 static void sun5i_clkevt_time_setup(struct sun5i_timer *ce, u8 timer, u32 delay) in sun5i_clkevt_time_setup() argument
76 writel(delay, ce->base + TIMER_INTVAL_LO_REG(timer)); in sun5i_clkevt_time_setup()
79 static void sun5i_clkevt_time_start(struct sun5i_timer *ce, u8 timer, bool periodic) in sun5i_clkevt_time_start() argument
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H A Dmps2-timer.c54 static int mps2_timer_shutdown(struct clock_event_device *ce) in mps2_timer_shutdown() argument
56 clockevent_mps2_writel(0, ce, TIMER_RELOAD); in mps2_timer_shutdown()
57 clockevent_mps2_writel(0, ce, TIMER_CTRL); in mps2_timer_shutdown()
62 static int mps2_timer_set_next_event(unsigned long next, struct clock_event_device *ce) in mps2_timer_set_next_event() argument
64 clockevent_mps2_writel(next, ce, TIMER_VALUE); in mps2_timer_set_next_event()
65 clockevent_mps2_writel(TIMER_CTRL_IE | TIMER_CTRL_ENABLE, ce, TIMER_CTRL); in mps2_timer_set_next_event()
70 static int mps2_timer_set_periodic(struct clock_event_device *ce) in mps2_timer_set_periodic() argument
72 u32 clock_count_per_tick = to_mps2_clkevt(ce)->clock_count_per_tick; in mps2_timer_set_periodic()
74 clockevent_mps2_writel(clock_count_per_tick, ce, TIMER_RELOAD); in mps2_timer_set_periodic()
75 clockevent_mps2_writel(clock_count_per_tick, ce, TIMER_VALUE); in mps2_timer_set_periodic()
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H A Dtimer-digicolor.c58 struct clock_event_device ce; member
64 static struct digicolor_timer *dc_timer(struct clock_event_device *ce) in dc_timer() argument
66 return container_of(ce, struct digicolor_timer, ce); in dc_timer()
69 static inline void dc_timer_disable(struct clock_event_device *ce) in dc_timer_disable() argument
71 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_disable()
75 static inline void dc_timer_enable(struct clock_event_device *ce, u32 mode) in dc_timer_enable() argument
77 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_enable()
81 static inline void dc_timer_set_count(struct clock_event_device *ce, in dc_timer_set_count() argument
84 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_set_count()
88 static int digicolor_clkevt_shutdown(struct clock_event_device *ce) in digicolor_clkevt_shutdown() argument
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H A Dtimer-rockchip.c43 struct clock_event_device ce; member
50 static inline struct rk_timer *rk_timer(struct clock_event_device *ce) in rk_timer() argument
52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer()
78 struct clock_event_device *ce) in rk_timer_set_next_event() argument
80 struct rk_timer *timer = rk_timer(ce); in rk_timer_set_next_event()
89 static int rk_timer_shutdown(struct clock_event_device *ce) in rk_timer_shutdown() argument
91 struct rk_timer *timer = rk_timer(ce); in rk_timer_shutdown()
97 static int rk_timer_set_periodic(struct clock_event_device *ce) in rk_timer_set_periodic() argument
99 struct rk_timer *timer = rk_timer(ce); in rk_timer_set_periodic()
109 struct clock_event_device *ce = dev_id; in rk_timer_interrupt() local
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/openbmc/linux/arch/arm/crypto/
H A DMakefile19 obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o
20 obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o
21 obj-$(CONFIG_CRYPTO_SHA2_ARM_CE) += sha2-arm-ce.o
22 obj-$(CONFIG_CRYPTO_GHASH_ARM_CE) += ghash-arm-ce.o
23 obj-$(CONFIG_CRYPTO_CRCT10DIF_ARM_CE) += crct10dif-arm-ce.o
24 obj-$(CONFIG_CRYPTO_CRC32_ARM_CE) += crc32-arm-ce.o
36 sha1-arm-ce-y := sha1-ce-core.o sha1-ce-glue.o
37 sha2-arm-ce-y := sha2-ce-core.o sha2-ce-glue.o
38 aes-arm-ce-y := aes-ce-core.o aes-ce-glue.o
39 ghash-arm-ce-y := ghash-ce-core.o ghash-ce-glue.o
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/openbmc/linux/drivers/base/power/
H A Dclock_ops.c145 * @ce: PM clock entry corresponding to the clock.
147 static inline void __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) in __pm_clk_enable() argument
151 switch (ce->status) { in __pm_clk_enable()
153 ret = clk_prepare_enable(ce->clk); in __pm_clk_enable()
156 ret = clk_enable(ce->clk); in __pm_clk_enable()
162 ce->status = PCE_STATUS_ENABLED; in __pm_clk_enable()
165 __func__, ce->clk, ret); in __pm_clk_enable()
171 * @ce: PM clock entry corresponding to the clock.
173 static void pm_clk_acquire(struct device *dev, struct pm_clock_entry *ce) in pm_clk_acquire() argument
175 if (!ce->clk) in pm_clk_acquire()
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/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/js/
H A Djquery-3.7.1.min.js2 …ce=function(e,t){return new ce.fn.init(e,t)};function c(e){var t=!!e&&"length"in e&&e.length,n=x(e… function
/openbmc/linux/drivers/gpu/drm/i915/selftests/
H A Di915_request.c209 struct intel_context *ce; in igt_request_rewind() local
218 ce = i915_gem_context_get_engine(ctx[0], RCS0); in igt_request_rewind()
219 GEM_BUG_ON(IS_ERR(ce)); in igt_request_rewind()
220 request = mock_request(ce, 2 * HZ); in igt_request_rewind()
221 intel_context_put(ce); in igt_request_rewind()
236 ce = i915_gem_context_get_engine(ctx[1], RCS0); in igt_request_rewind()
237 GEM_BUG_ON(IS_ERR(ce)); in igt_request_rewind()
238 vip = mock_request(ce, 0); in igt_request_rewind()
239 intel_context_put(ce); in igt_request_rewind()
287 struct i915_request *(*request_alloc)(struct intel_context *ce);
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