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/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
69 return 4 * size; in drm_dsc_dp_rc_buffer_size()
81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
109 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
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/openbmc/linux/arch/x86/math-emu/
H A Dmul_Xsig.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*---------------------------------------------------------------------------+
5 | Multiply a 12 byte fixed point number by another fixed point number. |
9 | Australia. E-mail billm@jacobi.maths.monash.edu.au |
21 +---------------------------------------------------------------------------*/
38 movl %eax,-4(%ebp)
39 movl %eax,-8(%ebp)
43 movl %edx,-12(%ebp)
45 movl 4(%esi),%eax /* midl of Xsig */
47 addl %eax,-12(%ebp)
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/openbmc/linux/arch/powerpc/crypto/
H A Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
28 # setup r^4, r^3, r^2, r vectors
29 # vs [r^1, r^3, r^2, r^4]
56 #include <asm/asm-offsets.h>
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H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
13 # do rounds, 8 quarter rounds
15 # 2. c += d; b ^= c; b <<<= 12;
16 # 3. a += b; d ^= a; d <<<= 8;
17 # 4. c += d; b ^= c; b <<<= 7
20 # row3 = (row3 + row4), row2 = row3 xor row2, row2 rotate each word by 12
21 # row1 = (row1 + row2), row4 = row1 xor row4, row4 rotate each word by 8
24 # 4 blocks (a b c d)
43 #include <asm/asm-offsets.h>
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H A Daes-spe-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #include "aes-spe-regs.h"
17 rlwimi rT0,in,28-((bpos+3)%4)*8,20,27;
20 rlwimi rT1,in,24-((bpos+3)%4)*8,24,31;
41 LBZ(out, rT0, 8)
44 LBZ(out, rT0, 8) /* load enc byte */
56 * via bl/blr. It expects that caller has pre-xored input data with first
57 * 4 words of encryption key into rD0-rD3. Pointer/counter registers must
58 * have also been set up before (rT0, rKP, CTR). Output is stored in rD0-rD3
59 * and rW0-rW3 and caller must execute a final xor on the output registers.
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H A Daes-spe-modes.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include "aes-spe-regs.h"
32 addi rSP,rSP,4; /* and increment pointer */
35 addi rDP,rDP,4; /* and increment pointer */
39 addi rIP,rIP,4; /* and increment pointer */
42 addi rIP,rIP,4; /* and increment pointer */
81 stwu r1,-160(r1); /* create stack frame */ \
82 lis rT0,tab@h; /* en-/decryption table pointer */ \
83 stw r0,8(r1); /* save link register */ \
99 lwz r0,8(r1); \
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/openbmc/linux/arch/arm/mach-davinci/
H A Dda830.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
14 #include <linux/irqchip/irq-davinci-cp-intc.h>
16 #include <clocksource/timer-davinci.h>
26 /* Offsets of the 8 compare registers on the da830 */
47 MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false)
48 MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false)
49 MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false)
50 MUX_CFG(DA830, EMB_SDCKE, 0, 8, 0xf, 1, false)
51 MUX_CFG(DA830, EMB_CLK_GLUE, 0, 12, 0xf, 1, false)
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/openbmc/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8516.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/mt65xx.h>
14 #include "pinctrl-mtk-common.h"
15 #include "pinctrl-mtk-mt8516.h"
18 /* 0E4E8SR 4/8/12/16 */
19 MTK_DRV_GRP(4, 16, 1, 2, 4),
20 /* 0E2E4SR 2/4/6/8 */
21 MTK_DRV_GRP(2, 8, 1, 2, 2),
22 /* E8E4E2 2/4/6/8/10/12/14/16 */
31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
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H A Dpinctrl-mt8167.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/mt65xx.h>
14 #include "pinctrl-mtk-common.h"
15 #include "pinctrl-mtk-mt8167.h"
18 /* 0E4E8SR 4/8/12/16 */
19 MTK_DRV_GRP(4, 16, 1, 2, 4),
20 /* 0E2E4SR 2/4/6/8 */
21 MTK_DRV_GRP(2, 8, 1, 2, 2),
22 /* E8E4E2 2/4/6/8/10/12/14/16 */
31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
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H A Dpinctrl-mt8127.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <dt-bindings/pinctrl/mt65xx.h>
15 #include "pinctrl-mtk-common.h"
16 #include "pinctrl-mtk-mt8127.h"
19 /* 0E4E8SR 4/8/12/16 */
20 MTK_DRV_GRP(4, 16, 1, 2, 4),
21 /* 0E2E4SR 2/4/6/8 */
22 MTK_DRV_GRP(2, 8, 1, 2, 2),
23 /* E8E4E2 2/4/6/8/10/12/14/16 */
32 MTK_PIN_DRV_GRP(4, 0xb00, 0, 1),
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H A Dpinctrl-mt2712.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pinctrl/pinconf-generic.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
16 #include "pinctrl-mtk-common.h"
17 #include "pinctrl-mtk-mt2712.h"
21 MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10),
22 MTK_PIN_PUPD_SPEC_SR(20, 0xe50, 5, 4, 3),
24 MTK_PIN_PUPD_SPEC_SR(22, 0xe50, 8, 7, 6),
28 MTK_PIN_PUPD_SPEC_SR(31, 0xf30, 6, 5, 4),
29 MTK_PIN_PUPD_SPEC_SR(32, 0xf30, 10, 9, 8),
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/openbmc/linux/
H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12
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/openbmc/linux/arch/sh/boards/mach-se/770x/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <mach-se/mach/se.h>
24 * 4: serial 1
27 * 8: rtc
28 * 12: mouse
33 { 13, 0, 8, 0x0f-13, },
34 { 5 , 0, 4, 0x0f- 5, },
35 { 10, 1, 0, 0x0f-10, },
36 { 7 , 2, 4, 0x0f- 7, },
37 { 3 , 2, 0, 0x0f- 3, },
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/openbmc/linux/sound/soc/codecs/
H A Drt5677.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5677.h -- RT5677 ALSA SoC audio driver
20 /* I/O - Output */
22 /* I/O - Input */
25 /* I/O - SLIMBus */
31 /* I/O - ADC/DAC */
43 /* Mixer - D-D */
60 /* Mixer - PDM */
116 /* Format - ADC/DAC */
124 /* Function - Analog */
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H A Drt5682s.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5682s.h -- RT5682I-VS ALSA SoC audio driver
17 #include <linux/clk-provider.h>
25 /* I/O - Output */
33 /* I/O - Input */
44 /* I/O - ADC/DAC/DMIC */
50 /* Mixer - D-D */
57 /* Mixer - ADC */
84 /* Format - ADC/DAC */
91 /* Format - TDM Control */
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H A Drt5682.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5682.h -- RT5682/RT5658 ALSA SoC audio driver
17 #include <linux/clk-provider.h>
28 /* I/O - Output */
36 /* I/O - Input */
45 /* I/O - ADC/DAC/DMIC */
51 /* Mixer - D-D */
58 /* Mixer - ADC */
77 /* Format - ADC/DAC */
84 /* Format - TDM Control */
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H A Drt5668.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5668.h -- RT5668/RT5658 ALSA SoC audio driver
21 /* I/O - Output */
29 /* I/O - Input */
38 /* I/O - ADC/DAC/DMIC */
44 /* Mixer - D-D */
51 /* Mixer - ADC */
70 /* Format - ADC/DAC */
77 /* Format - TDM Control */
83 /* Function - Analog */
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/openbmc/linux/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
32 #define CRn_shift 12
34 #define CRm_shift 8
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/openbmc/linux/include/soc/mscc/
H A Docelot_dev.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
14 #define DEV_CLOCK_CFG_PCS_RX_RST BIT(4)
20 #define DEV_PORT_MISC_FWD_ERROR_ENA BIT(4)
30 #define DEV_EEE_CFG_EEE_TIMER_WAKEUP(x) (((x) << 8) & GENMASK(14, 8))
31 #define DEV_EEE_CFG_EEE_TIMER_WAKEUP_M GENMASK(14, 8)
32 #define DEV_EEE_CFG_EEE_TIMER_WAKEUP_X(x) (((x) & GENMASK(14, 8)) >> 8)
38 #define DEV_PTP_PREDICT_CFG_PTP_PHY_PREDICT_CFG(x) (((x) << 4) & GENMASK(11, 4))
39 #define DEV_PTP_PREDICT_CFG_PTP_PHY_PREDICT_CFG_M GENMASK(11, 4)
40 #define DEV_PTP_PREDICT_CFG_PTP_PHY_PREDICT_CFG_X(x) (((x) & GENMASK(11, 4)) >> 4)
44 #define DEV_MAC_ENA_CFG_RX_ENA BIT(4)
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/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds_crossbar_con.h1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #define NUM_CON_VSC3316 8
10 #define NUM_CON_VSC3308 4
12 static const int8_t vsc16_tx_amc[8][2] = { {15, 3}, {0, 2}, {7, 4}, {9, 10},
13 {5, 11}, {4, 5}, {2, 6}, {12, 9} };
15 static int8_t vsc16_tx_sfp[8][2] = { {15, 7}, {0, 1}, {7, 8}, {9, 0},
16 {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
18 static int8_t vsc16_tx_4sfp_sgmii_12_56[8][2] = { {15, 7}, {0, 1},
19 {7, 8}, {9, 0}, {2, 14}, {12, 15},
20 {-1, -1}, {-1, -1} };
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-yuv-planar.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. planar-yuv:
12 - Semi-planar formats use two planes. The first plane is the luma plane and
16 - Fully planar formats use three planes to store the Y, Cb and Cr components
26 and applications that support the multi-planar API, described in
27 :ref:`planar-apis`. Unless explicitly documented as supporting non-contiguous
31 Semi-Planar YUV Formats
46 For non-contiguous formats, no constraints are enforced by the format on the
57 .. flat-table:: Overview of Semi-Planar YUV Formats
58 :header-rows: 1
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/openbmc/u-boot/drivers/sound/
H A Drt5677.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * rt5677.h -- RealTek ALC5677 ALSA SoC Audio driver
27 /* I/O - Output */
29 /* I/O - Input */
32 /* I/O - SLIMBus */
38 /* I/O - ADC/DAC */
50 /* Mixer - D-D */
67 /* Mixer - PDM */
123 /* Format - ADC/DAC */
131 /* Function - Analog */
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
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/openbmc/linux/lib/zstd/compress/
H A Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
23 static const ZSTD_compressionParameters ZSTD_defaultCParameters[4][ZSTD_MAX_CLEVEL+1] = {
24 { /* "default" - for any srcSize > 256 KB */
26 { 19, 12, 13, 1, 6, 1, ZSTD_fast }, /* base for negative levels */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
32 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
33 { 21, 19, 20, 4, 5, 8, ZSTD_lazy }, /* level 7 */
34 { 21, 19, 20, 4, 5, 16, ZSTD_lazy2 }, /* level 8 */
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/openbmc/linux/drivers/gpu/drm/tidss/
H A Dtidss_scale_coefs.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
17 .c2 = { 28, 34, 40, 46, 52, 58, 64, 70, 0, 2, 4, 8, 12, 16, 20, 24, },
23 .c2 = { 24, 28, 32, 38, 44, 50, 56, 64, 0, 2, 4, 6, 8, 12, 16, 20, },
29 .c2 = { 16, 20, 24, 30, 36, 42, 48, 56, 0, 0, 0, 2, 4, 8, 12, 14, },
35 .c2 = { 12, 14, 16, 22, 28, 34, 40, 48, 0, 0, 0, 2, 4, 4, 4, 8, },
41 .c2 = { 0, 2, 4, 8, 12, 18, 24, 32, 0, 0, 0, -2, -4, -4, -4, -2, },
47 .c2 = { -8, -6, -4, -2, 0, 6, 12, 18, 0, -2, -4, -6, -8, -8, -8, -8, },
53 .c2 = { -12, -12, -12, -10, -8, -4, 0, 6, 0, -2, -4, -6, -8, -10, -12, -12, },
54 .c1 = { 112, 130, 148, 164, 180, 196, 212, 228, 12, 22, 32, 44, 56, 70, 84, 98, },
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