/openbmc/linux/arch/arm64/tools/ |
H A D | sysreg | 87 Res0 5:1 292 Sysreg ID_MMFR1_EL1 3 0 0 1 5 620 Sysreg ID_ISAR5_EL1 3 0 0 2 5 835 Sysreg ID_DFR1_EL1 3 0 0 3 5 1052 Sysreg ID_AA64SMFR0_EL1 3 0 0 4 5 1109 Sysreg ID_AA64DFR0_EL1 3 0 0 5 0 1172 Sysreg ID_AA64DFR1_EL1 3 0 0 5 1 1176 Sysreg ID_AA64AFR0_EL1 3 0 0 5 4 1188 Sysreg ID_AA64AFR1_EL1 3 0 0 5 5 1692 0b00 NONE [all …]
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/openbmc/linux/drivers/pwm/ |
H A D | pwm-imx-tpm.c | 40 #define PWM_IMX_TPM_SC_CPWMS BIT(5) 43 #define PWM_IMX_TPM_CnSC_MSB BIT(5) 162 * Assume reserved values (2b00 and 2b11) to yield in pwm_imx_tpm_get_state() 209 * if the PWM is disabled (CMOD[1:0] = 2b00), then MOD register in pwm_imx_tpm_apply_hw() 212 * if the PWM is enabled (CMOD[1:0] ≠ 2b00), the period length in pwm_imx_tpm_apply_hw() 229 * if the PWM is disabled (CMOD[1:0] = 2b00), then CnV register in pwm_imx_tpm_apply_hw() 232 * if the PWM is enabled (CMOD[1:0] ≠ 2b00), the duty length in pwm_imx_tpm_apply_hw()
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/openbmc/intel-ipmi-oem/src/ |
H A D | me_to_redfish_hooks.cpp | 150 {0b00, "BMC"}, {0b01, "PSU"}, {0b10, "On-board power sensor"}}; in messageHook() 153 chassisSource = {{0b00, "BMC"}, in messageHook() 160 {0b00, "BMC"}, {0b01, "PSU"}, {0b11, "Not supported"}}; in messageHook() 163 unmanagedSource = {{0b00, "BMC"}, {0b01, "Estimated"}}; in messageHook() 166 failureReason = {{0b00, "BMC discovery failure"}, in messageHook() 176 auto dc = dcSource.find(selData.eventData3 >> 5 & 0b11); in messageHook() 196 const auto it = failureReason.find(selData.eventData3 >> 5 & 0b11); in messageHook()
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/openbmc/linux/drivers/zorro/ |
H A D | zorro.ids | 43 5a00 A2065 [Ethernet Card] 107 0b00 2400zi [Modem] 319 0b00 Picasso II/II+ RAM [Graphics Card] 360 0b00 Piccolo SD64 [Graphics Card] 414 2140 Phase 5 419 0b00 Blizzard 1230-II/Fastlane Z3/CyberSCSI/CyberStorm060 [Accelerator and/or SCSI Host Adapter] 474 2b00 SRAM [RAM Expansion]
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/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | release.S | 149 * 18-19 CHIP_ID, 2'b00 - SoC 1 151 * 20-24 CLUSTER_ID 5'b00000 - CCM 1 153 * 25-26 CORE_CLUSTER_ID 2'b00 - cluster 1 157 * 27-28 CORE_ID 2'b00 - core 0 171 srwi r10,r0,5 /* r10 = cluster */ 430 rlwinm r12,r4,0,0,5
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap3430es1-clocks.dtsi | 33 gfx_cg1_ck: gfx_cg1_ck@b00 { 41 gfx_cg2_ck: gfx_cg2_ck@b00 { 68 ti,bit-shift = <5>; 155 ti,bit-shift = <5>;
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,spmi-clkdiv.yaml | 56 clock-controller@5b00 {
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/openbmc/linux/include/uapi/linux/ |
H A D | cciss_defs.h | 61 BYTE Mode:2; /* b00 */ 69 BYTE Dev:5;
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/openbmc/linux/Documentation/admin-guide/perf/ |
H A D | hisi-pcie-pmu.rst | 71 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5 83 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,bdf=0x3900/ sleep 5 98 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,trig_len=0x4,trig_mode=1/ sleep 5 112 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,thr_len=0x4,thr_mode=1/ sleep 5 119 - 2'b00: Reserved (Do not use this since the behaviour is undefined) 130 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,len_mode=0x1/ sleep 5
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H A D | hisi-pmu.rst | 53 $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5 54 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5 62 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0x3/ sleep 5 72 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5 76 3. Datasrc allows the user to check where the data comes from. It is 5 bits. 79 - 5'b00001: comes from L3C in this die; 80 - 5'b01000: comes from L3C in the cross-die; 81 - 5'b01001: comes from L3C which is in another socket; 82 - 5'b01110: comes from the local DDR; 83 - 5'b01111: comes from the cross-die DDR; [all …]
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/openbmc/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_ip_flow.h | 34 * [14 : 13] 2'b00 Access to Ram Wrappers Internal Register 36 * [5 : 0] Ram Wrapper Internal Register offset See related Ram Wrappers
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/openbmc/linux/drivers/clk/ralink/ |
H A D | clk-mtmips.c | 79 #define CPU_SYS_CLKCFG_OCP_RATIO_3_5 5 /* 1:3.5 (Reserved) */ 81 #define CPU_SYS_CLKCFG_OCP_RATIO_5 7 /* 1:5 */ 181 { CLK_PERIPH("10000b00.spi", "bus") }, 194 { CLK_PERIPH("10000b00.spi", "bus") }, 207 { CLK_PERIPH("10000b00.spi", "bus") }, 218 { CLK_PERIPH("10000b00.spi", "bus") }, 610 [CPU_SYS_CLKCFG_OCP_RATIO_5] = 5, in mt7620_bus_recalc_rate()
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/openbmc/linux/drivers/usb/host/ |
H A D | octeon-hcd.h | 201 * * 3'b001: 5 bits 593 * - 2'b00: IN/OUT token 650 * * 5'h0: Non-Periodic TxFIFO flush 651 * * 5'h1: Periodic TxFIFO 1 flush in Device mode or Periodic 653 * * 5'h2: Periodic TxFIFO 2 flush in Device mode 655 * * 5'hF: Periodic TxFIFO 15 flush in Device mode 656 * * 5'h10: Flush all the Periodic and Non-Periodic TxFIFOs in the 746 __BITFIELD_FIELD(u32 txfnum : 5, 807 * * 2'b00: DATA0 1002 * * 2'b00: Reserved. This field yields undefined results. [all …]
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/openbmc/openbmc/meta-ampere/meta-mitchell/recipes-ampere/platform/ampere-platform-init/ |
H A D | ampere_platform_init.sh | 41 # BIT[7:6:5:4] 59 # P[7:6] = 2'b00 for Mitchell 1.0 (EVTx, DVTx, PVT1 )
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/openbmc/qemu/rust/hw/char/pl011/src/ |
H A D | lib.rs | 350 /// b00 = 5 bits. 445 /// b00 = 5 bits. 446 _5Bits = 0b00, 486 /// on page 4-5 is set to 1, then the nSIROUT path is inverted, and fed 558 pub const INT_TX: u32 = 1 << 5; 574 TX = 1 << 5,
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | tqm5200.dts | 81 gpio_simple: gpio@b00 { 99 3 4 0 3 5 0 3 6 0 3 7 0 131 interrupts = <2 5 0>; 140 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
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H A D | charon.dts | 84 gpio_simple: gpio@b00 { 103 3 4 0 3 5 0 3 6 0 3 7 0 129 interrupts = <2 5 0>; 138 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
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H A D | lite5200.dts | 114 interrupts = <1 5 0 1 6 0>; 129 gpio@b00 { 161 3 4 0 3 5 0 3 6 0 3 7 0 213 // cell-index = <5>; 222 interrupts = <2 5 0>; 231 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
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H A D | mpc5200b.dtsi | 123 interrupts = <1 5 0 1 6 0>; 138 gpio_simple: gpio@b00 { 172 3 4 0 3 5 0 3 6 0 3 7 0 222 interrupts = <2 5 0>; 230 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
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/openbmc/u-boot/board/isee/igep00x0/ |
H A D | igep00x0.c | 47 * IGEP0020-RF = 0b00 116 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], in setup_net_chip() 197 char rev[5] = { 'F','C','G','E', }; in set_boardname()
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | am33xx-usb.txt | 119 &cppi41dma 4 0 &cppi41dma 5 0 127 &cppi41dma 5 1 &cppi41dma 6 1 141 usb1_phy: usb-phy@47401b00 {
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/openbmc/u-boot/board/isee/igep003x/ |
H A D | board.c | 36 * IGEP0034-LITE = 0b00 254 .mac_control = (1 << 5), 275 mac_addr[5] = (mac_lo & 0xFF00) >> 8; in board_eth_init()
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/openbmc/linux/Documentation/arch/m68k/ |
H A D | buddha-driver.rst | 54 $b00-$bff IDE-Select 3 (Port 1, Register set 1) 59 $d00-$dff IDE-Select 5 (Port 3, Register set 1, 131 only the upper three bits are used (Bits 7 to 5). Bit 4 137 The values in this table have to be shifted 5 bits to the 138 left and or'd with $1f (this sets the lower 5 bits). 144 (exactly 70,5 at 14,18 Mhz on PAL systems). 158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle) 161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles) 163 value 5 164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles) [all …]
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/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | p2020ds.dtsi | 123 nand@5,0 { 155 interrupts = <5 1 0 0>; 159 interrupts = <5 1 0 0>; 186 fsl,tclk-period = <5>; 239 // IDSEL 0x11 func 5 - PCI slot 1 317 compatible = "pnpPNP,b00";
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/openbmc/linux/arch/powerpc/perf/ |
H A D | isa207-common.c | 93 * Marked event: MMCRA[SDAR_MODE] will be set to 0b00 ('No Updates'), in mmcra_sdar_mode() 241 else if (sub_idx == 5 || sub_idx == 7) in isa207_find_source() 255 case 5: in isa207_find_source() 261 else if (sub_idx == 1 || sub_idx == 5) in isa207_find_source() 274 else if (sub_idx == 3 || sub_idx == 5) in isa207_find_source() 346 case 5: in isa207_get_mem_data_src() 430 if (pmc >= 5 && base_event != 0x500fa && in isa207_get_constraint() 443 if (pmc >= 5) in isa207_get_constraint() 451 * Don't count events on PMC 5 & 6, there is only one valid event in isa207_get_constraint() 713 /* If we're not using PMC 5 or 6, freeze them */ in isa207_compute_mmcr() [all …]
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