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/openbmc/linux/arch/arm64/tools/
H A Dsysreg87 Res0 5:1
292 Sysreg ID_MMFR1_EL1 3 0 0 1 5
620 Sysreg ID_ISAR5_EL1 3 0 0 2 5
835 Sysreg ID_DFR1_EL1 3 0 0 3 5
1052 Sysreg ID_AA64SMFR0_EL1 3 0 0 4 5
1109 Sysreg ID_AA64DFR0_EL1 3 0 0 5 0
1172 Sysreg ID_AA64DFR1_EL1 3 0 0 5 1
1176 Sysreg ID_AA64AFR0_EL1 3 0 0 5 4
1188 Sysreg ID_AA64AFR1_EL1 3 0 0 5 5
1692 0b00 NONE
[all …]
/openbmc/linux/drivers/pwm/
H A Dpwm-imx-tpm.c40 #define PWM_IMX_TPM_SC_CPWMS BIT(5)
43 #define PWM_IMX_TPM_CnSC_MSB BIT(5)
162 * Assume reserved values (2b00 and 2b11) to yield in pwm_imx_tpm_get_state()
209 * if the PWM is disabled (CMOD[1:0] = 2b00), then MOD register in pwm_imx_tpm_apply_hw()
212 * if the PWM is enabled (CMOD[1:0] ≠ 2b00), the period length in pwm_imx_tpm_apply_hw()
229 * if the PWM is disabled (CMOD[1:0] = 2b00), then CnV register in pwm_imx_tpm_apply_hw()
232 * if the PWM is enabled (CMOD[1:0] ≠ 2b00), the duty length in pwm_imx_tpm_apply_hw()
/openbmc/intel-ipmi-oem/src/
H A Dme_to_redfish_hooks.cpp150 {0b00, "BMC"}, {0b01, "PSU"}, {0b10, "On-board power sensor"}}; in messageHook()
153 chassisSource = {{0b00, "BMC"}, in messageHook()
160 {0b00, "BMC"}, {0b01, "PSU"}, {0b11, "Not supported"}}; in messageHook()
163 unmanagedSource = {{0b00, "BMC"}, {0b01, "Estimated"}}; in messageHook()
166 failureReason = {{0b00, "BMC discovery failure"}, in messageHook()
176 auto dc = dcSource.find(selData.eventData3 >> 5 & 0b11); in messageHook()
196 const auto it = failureReason.find(selData.eventData3 >> 5 & 0b11); in messageHook()
/openbmc/linux/drivers/zorro/
H A Dzorro.ids43 5a00 A2065 [Ethernet Card]
107 0b00 2400zi [Modem]
319 0b00 Picasso II/II+ RAM [Graphics Card]
360 0b00 Piccolo SD64 [Graphics Card]
414 2140 Phase 5
419 0b00 Blizzard 1230-II/Fastlane Z3/CyberSCSI/CyberStorm060 [Accelerator and/or SCSI Host Adapter]
474 2b00 SRAM [RAM Expansion]
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Drelease.S149 * 18-19 CHIP_ID, 2'b00 - SoC 1
151 * 20-24 CLUSTER_ID 5'b00000 - CCM 1
153 * 25-26 CORE_CLUSTER_ID 2'b00 - cluster 1
157 * 27-28 CORE_ID 2'b00 - core 0
171 srwi r10,r0,5 /* r10 = cluster */
430 rlwinm r12,r4,0,0,5
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3430es1-clocks.dtsi33 gfx_cg1_ck: gfx_cg1_ck@b00 {
41 gfx_cg2_ck: gfx_cg2_ck@b00 {
68 ti,bit-shift = <5>;
155 ti,bit-shift = <5>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,spmi-clkdiv.yaml56 clock-controller@5b00 {
/openbmc/linux/include/uapi/linux/
H A Dcciss_defs.h61 BYTE Mode:2; /* b00 */
69 BYTE Dev:5;
/openbmc/linux/Documentation/admin-guide/perf/
H A Dhisi-pcie-pmu.rst71 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5
83 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,bdf=0x3900/ sleep 5
98 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,trig_len=0x4,trig_mode=1/ sleep 5
112 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,thr_len=0x4,thr_mode=1/ sleep 5
119 - 2'b00: Reserved (Do not use this since the behaviour is undefined)
130 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,len_mode=0x1/ sleep 5
H A Dhisi-pmu.rst53 $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5
54 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5
62 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0x3/ sleep 5
72 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
76 3. Datasrc allows the user to check where the data comes from. It is 5 bits.
79 - 5'b00001: comes from L3C in this die;
80 - 5'b01000: comes from L3C in the cross-die;
81 - 5'b01001: comes from L3C which is in another socket;
82 - 5'b01110: comes from the local DDR;
83 - 5'b01111: comes from the cross-die DDR;
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_ip_flow.h34 * [14 : 13] 2'b00 Access to Ram Wrappers Internal Register
36 * [5 : 0] Ram Wrapper Internal Register offset See related Ram Wrappers
/openbmc/linux/drivers/clk/ralink/
H A Dclk-mtmips.c79 #define CPU_SYS_CLKCFG_OCP_RATIO_3_5 5 /* 1:3.5 (Reserved) */
81 #define CPU_SYS_CLKCFG_OCP_RATIO_5 7 /* 1:5 */
181 { CLK_PERIPH("10000b00.spi", "bus") },
194 { CLK_PERIPH("10000b00.spi", "bus") },
207 { CLK_PERIPH("10000b00.spi", "bus") },
218 { CLK_PERIPH("10000b00.spi", "bus") },
610 [CPU_SYS_CLKCFG_OCP_RATIO_5] = 5, in mt7620_bus_recalc_rate()
/openbmc/linux/drivers/usb/host/
H A Docteon-hcd.h201 * * 3'b001: 5 bits
593 * - 2'b00: IN/OUT token
650 * * 5'h0: Non-Periodic TxFIFO flush
651 * * 5'h1: Periodic TxFIFO 1 flush in Device mode or Periodic
653 * * 5'h2: Periodic TxFIFO 2 flush in Device mode
655 * * 5'hF: Periodic TxFIFO 15 flush in Device mode
656 * * 5'h10: Flush all the Periodic and Non-Periodic TxFIFOs in the
746 __BITFIELD_FIELD(u32 txfnum : 5,
807 * * 2'b00: DATA0
1002 * * 2'b00: Reserved. This field yields undefined results.
[all …]
/openbmc/openbmc/meta-ampere/meta-mitchell/recipes-ampere/platform/ampere-platform-init/
H A Dampere_platform_init.sh41 # BIT[7:6:5:4]
59 # P[7:6] = 2'b00 for Mitchell 1.0 (EVTx, DVTx, PVT1 )
/openbmc/qemu/rust/hw/char/pl011/src/
H A Dlib.rs350 /// b00 = 5 bits.
445 /// b00 = 5 bits.
446 _5Bits = 0b00,
486 /// on page 4-5 is set to 1, then the nSIROUT path is inverted, and fed
558 pub const INT_TX: u32 = 1 << 5;
574 TX = 1 << 5,
/openbmc/linux/arch/powerpc/boot/dts/
H A Dtqm5200.dts81 gpio_simple: gpio@b00 {
99 3 4 0 3 5 0 3 6 0 3 7 0
131 interrupts = <2 5 0>;
140 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
H A Dcharon.dts84 gpio_simple: gpio@b00 {
103 3 4 0 3 5 0 3 6 0 3 7 0
129 interrupts = <2 5 0>;
138 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
H A Dlite5200.dts114 interrupts = <1 5 0 1 6 0>;
129 gpio@b00 {
161 3 4 0 3 5 0 3 6 0 3 7 0
213 // cell-index = <5>;
222 interrupts = <2 5 0>;
231 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
H A Dmpc5200b.dtsi123 interrupts = <1 5 0 1 6 0>;
138 gpio_simple: gpio@b00 {
172 3 4 0 3 5 0 3 6 0 3 7 0
222 interrupts = <2 5 0>;
230 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
/openbmc/u-boot/board/isee/igep00x0/
H A Digep00x0.c47 * IGEP0020-RF = 0b00
116 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], in setup_net_chip()
197 char rev[5] = { 'F','C','G','E', }; in set_boardname()
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dam33xx-usb.txt119 &cppi41dma 4 0 &cppi41dma 5 0
127 &cppi41dma 5 1 &cppi41dma 6 1
141 usb1_phy: usb-phy@47401b00 {
/openbmc/u-boot/board/isee/igep003x/
H A Dboard.c36 * IGEP0034-LITE = 0b00
254 .mac_control = (1 << 5),
275 mac_addr[5] = (mac_lo & 0xFF00) >> 8; in board_eth_init()
/openbmc/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst54 $b00-$bff IDE-Select 3 (Port 1, Register set 1)
59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
131 only the upper three bits are used (Bits 7 to 5). Bit 4
137 The values in this table have to be shifted 5 bits to the
138 left and or'd with $1f (this sets the lower 5 bits).
144 (exactly 70,5 at 14,18 Mhz on PAL systems).
158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
163 value 5
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dp2020ds.dtsi123 nand@5,0 {
155 interrupts = <5 1 0 0>;
159 interrupts = <5 1 0 0>;
186 fsl,tclk-period = <5>;
239 // IDSEL 0x11 func 5 - PCI slot 1
317 compatible = "pnpPNP,b00";
/openbmc/linux/arch/powerpc/perf/
H A Disa207-common.c93 * Marked event: MMCRA[SDAR_MODE] will be set to 0b00 ('No Updates'), in mmcra_sdar_mode()
241 else if (sub_idx == 5 || sub_idx == 7) in isa207_find_source()
255 case 5: in isa207_find_source()
261 else if (sub_idx == 1 || sub_idx == 5) in isa207_find_source()
274 else if (sub_idx == 3 || sub_idx == 5) in isa207_find_source()
346 case 5: in isa207_get_mem_data_src()
430 if (pmc >= 5 && base_event != 0x500fa && in isa207_get_constraint()
443 if (pmc >= 5) in isa207_get_constraint()
451 * Don't count events on PMC 5 & 6, there is only one valid event in isa207_get_constraint()
713 /* If we're not using PMC 5 or 6, freeze them */ in isa207_compute_mmcr()
[all …]

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