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/openbmc/linux/Documentation/devicetree/bindings/display/hisilicon/
H A Dhisi-ade.txt23 The rate of "clk_ade_core" could be "360000000" or "180000000";
56 assigned-clock-rates = <360000000>, <288000000>;
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h6-gpu-opp.dtsi28 opp-360000000 {
29 opp-hz = /bits/ 64 <360000000>;
/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dov8856.yaml82 enum: [ 360000000, 180000000 ]
129 link-frequencies = /bits/ 64 <360000000>;
H A Dovti,ov8865.yaml110 link-frequencies = /bits/ 64 <360000000>;
/openbmc/linux/arch/mips/lantiq/
H A Dclk.h35 #define CLOCK_360M 360000000
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm845-db845c-navigation-mezzanine.dts59 <360000000 180000000>;
/openbmc/linux/drivers/clk/qcom/
H A Dcamcc-sc7180.c277 F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0),
336 F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0),
439 F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0),
462 F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0),
485 F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0),
563 F(360000000, P_CAM_CC_PLL3_OUT_MAIN, 3, 0, 0),
H A Dgcc-msm8917.c641 F(360000000, P_GPLL6, 3, 0, 0),
1131 F(360000000, P_GPLL6, 3, 0, 0),
1159 F(360000000, P_GPLL6, 3, 0, 0),
H A Dgcc-msm8976.c1321 F(360000000, P_GPLL6_OUT, 3, 0, 0),
1396 F(360000000, P_GPLL6_GFX3D, 3, 0, 0),
1634 F(360000000, P_GPLL6_AUX, 3, 0, 0),
/openbmc/linux/drivers/media/pci/intel/
H A Dipu-bridge.c50 IPU_SENSOR_CONFIG("INT347A", 1, 360000000),
56 IPU_SENSOR_CONFIG("OVTI8856", 3, 180000000, 360000000, 720000000),
58 IPU_SENSOR_CONFIG("INT3474", 1, 360000000),
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-cci.yaml240 link-frequencies = /bits/ 64 <360000000 180000000>;
/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/
H A Dtypes.h95 #define SC_360MHZ 360000000U /* 360MHz */
/openbmc/linux/drivers/media/tuners/
H A Dmxl5005s.c2138 Fref = 360000000UL ; in MXL_IFSynthInit()
2191 Fref = 360000000UL ; in MXL_IFSynthInit()
2211 Fref = 360000000UL ; in MXL_IFSynthInit()
2216 Fref = 360000000UL ; in MXL_IFSynthInit()
2226 Fref = 360000000UL ; in MXL_IFSynthInit()
2261 Fref = 360000000UL ; in MXL_IFSynthInit()
2824 if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) { in MXL_TuneRF()
2831 if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) { in MXL_TuneRF()
2892 if (state->RF_IN >= 280000000 && state->RF_IN < 360000000) { in MXL_TuneRF()
2898 if (state->RF_IN >= 360000000 && state->RF_IN < 560000000) { in MXL_TuneRF()
[all …]
/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hi3620.c269 case 360000000: in mmc_clk_recalc_rate()
293 req->best_parent_rate = 360000000; in mmc_clk_determine_rate()
/openbmc/linux/drivers/clk/ralink/
H A Dclk-mtmips.c402 return 360000000; in rt5350_cpu_recalc_rate()
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8183.dtsi579 opp-360000000 {
580 opp-hz = /bits/ 64 <360000000>;
/openbmc/linux/drivers/media/i2c/
H A Dov2740.c16 #define OV2740_LINK_FREQ_360MHZ 360000000ULL
H A Dmt9p031.c221 .out_clock_max = 360000000, in mt9p031_clk_setup()
H A Dov8856.c1463 360000000,
1513 360000000,
H A Dov08d10.c558 360000000,
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220.dtsi935 assigned-clock-rates = <360000000>, <288000000>;
/openbmc/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_cfg.c833 .max_clk = 360000000,
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3188.c86 RK3066_PLL_RATE( 360000000, 1, 60, 4),
H A Dclk-rk3288.c95 RK3066_PLL_RATE( 360000000, 1, 60, 4),
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos850.c576 FRATE(CLK_DLL_DCO, "clk_dll_dco", NULL, 0, 360000000),

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