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/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm8550-dpu.yaml117 opp-325000000 {
118 opp-hz = /bits/ 64 <325000000>;
H A Dqcom,sm8450-dpu.yaml123 opp-325000000 {
124 opp-hz = /bits/ 64 <325000000>;
H A Dqcom,sm8550-mdss.yaml165 opp-325000000 {
166 opp-hz = /bits/ 64 <325000000>;
H A Dqcom,sm8450-mdss.yaml170 opp-325000000 {
171 opp-hz = /bits/ 64 <325000000>;
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Dac5-98dx35xx.dtsi16 clock-frequency = <325000000>;
/openbmc/linux/drivers/media/tuners/
H A De4000_priv.h53 { 325000000, 0x0a, 12 }, /* 2599200000 3900000000 */
H A Dtda827x.c356 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
386 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 2, .sbs = 2, .gc3 = 1},
415 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/
H A Dtypes.h49 #define SC_325MHZ 325000000U /* 325MHz */
/openbmc/u-boot/arch/arm/dts/
H A Duniphier-pxs3.dtsi85 opp-325000000 {
86 opp-hz = /bits/ 64 <325000000>;
/openbmc/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-pxs3.dtsi97 opp-325000000 {
98 opp-hz = /bits/ 64 <325000000>;
/openbmc/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-rgmii.c137 if (cpu_clock_hz >= 325000000 && cpu_clock_hz < 375000000) in __cvmx_helper_errata_asx_pass1()
/openbmc/linux/drivers/media/dvb-frontends/
H A Dtda18271c2dd_maps.h242 { 325000000, 0x44 },
/openbmc/linux/drivers/clk/qcom/
H A Ddispcc-sm8550.c591 F(325000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
H A Ddispcc-sm8450.c555 F(325000000, P_DISP_CC_PLL0_OUT_MAIN, 3, 0, 0),
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8550.dtsi2526 opp-325000000 {
2527 opp-hz = /bits/ 64 <325000000>;
H A Dsm8450.dtsi2829 opp-325000000 {
2830 opp-hz = /bits/ 64 <325000000>;
/openbmc/qemu/include/libdecnumber/
H A DdecDPD.h683 322000000, 323000000, 324000000, 325000000, 326000000, 327000000, 328000000,