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/openbmc/openbmc/meta-raspberrypi/recipes-core/psplash/files/
H A Dpsplash-raspberrypi-img.h29 "\0\0\377\4\0\0\0\376\0\0\0\272\0\0\0M\0\0\0\2\213\0\0\0\0\2\0\0\0\17" \
38 "\0\0\0\0\4\0\0\0*\0\0\0w\0\0\0\270\0\0\0\353\205\0\0\0\377\5\0\0\0\350" \
41 "\2\0\0\0\323\0\0\0F\377\0\0\0\0\351\0\0\0\0\2\0\0\0\34\0\0\0\275\270" \
45 "\270\0\0\0\377\3\0\0\0\376\0\0\0\225\0\0\0\11\377\0\0\0\0\346\0\0\0\0" \
72 "\0""8\0\0\0M\203\0\0\0U\7\0\0\0P\0\0\0@\0\0\0""0\0\0\0\37\0\0\0\17\0" \
131 "\0\0f\5\0\0\0]\0\0\0M\0\0\0=\0\0\0D\0\0\0\361\256\0\0\0\377\3\15\23\5" \
133 "m\236%\377Ca\27\377\24\34\7\377\215\0\0\0\377\1\\\205\40\377\207u\251" \
135 "(\377m\236%\377*=\16\377\265\0\0\0\377\2\0\0\0\307\0\0\0+\316\0\0\0\0" \
145 "t\33\377\30\"\10\377\213\0\0\0\377\1""4K\22\377\210u\251(\377\2m\235" \
153 "\24\5\377\270\0\0\0\377\5\0\0\0\375\0\0\0\337\0\0\0\235\0\0\0R\0\0\0" \
[all …]
/openbmc/linux/drivers/clk/uniphier/
H A Dclk-uniphier-sys.c12 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 8), \
13 UNIPHIER_CLK_FACTOR("sd-133m", -1, "vpll27a", 1, 2)
16 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 12), \
17 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 18)
20 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 10), \
21 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 15)
24 UNIPHIER_CLK_FACTOR("sd-200m", -1, "spll", 1, 4), \
25 UNIPHIER_CLK_FACTOR("sd-133m", -1, "spll", 1, 6)
28 UNIPHIER_CLK_FACTOR("nand-50m", -1, "spll", 1, 32), \
29 UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
[all …]
/openbmc/linux/drivers/clk/ralink/
H A Dclk-mt7621.c71 GATE(MT7621_CLK_HSDMA, "hsdma", "150m", BIT(5)),
72 GATE(MT7621_CLK_FE, "fe", "250m", BIT(6)),
73 GATE(MT7621_CLK_SP_DIVTX, "sp_divtx", "270m", BIT(7)),
74 GATE(MT7621_CLK_TIMER, "timer", "50m", BIT(8)),
75 GATE(MT7621_CLK_PCM, "pcm", "270m", BIT(11)),
76 GATE(MT7621_CLK_PIO, "pio", "50m", BIT(13)),
78 GATE(MT7621_CLK_NAND, "nand", "125m", BIT(15)),
79 GATE(MT7621_CLK_I2C, "i2c", "50m", BIT(16)),
80 GATE(MT7621_CLK_I2S, "i2s", "270m", BIT(17)),
82 GATE(MT7621_CLK_UART1, "uart1", "50m", BIT(19)),
[all …]
/openbmc/openbmc/meta-openembedded/meta-networking/dynamic-layers/meta-python/recipes-connectivity/firewalld/files/
H A Drun-ptest7 for m in $FIREWALLD_KERNEL_MODULES; do
8 if modprobe $m; then
9 echo "PASS: loading $m"
11 echo "FAIL: loading $m"
17 # Failing testsuites: 203 226 241 250 270 280 281 282 285 286
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt7621-sysc.yaml78 "50m", "125m", "150m",
79 "250m", "270m";
/openbmc/linux/Documentation/arch/arm/omap/
H A Ddss.rst167 rotate Rotation 0-3 for 0, 90, 180, 270 degrees
201 rotate Rotation 0-3 for 0, 90, 180, 270 degrees
325 "1:4M" to allocate 4M for fb1.
343 3 - 270 degree rotation
/openbmc/linux/Documentation/hwmon/
H A Dcoretemp.rst11 - 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
71 i7 3920XM, 3820QM, 3720QM, 3667U, 3520M 105
72 i5 3427U, 3360M/3320M 105
83 i7 660UM/640/620, 640LM/620, 620M, 610E 105
84 i5 540UM/520/430, 540M/520/450/430 105
85 i3 330E, 370M/350/330 90 rPGA, 105 BGA
124 N280/270 90
/openbmc/linux/Documentation/fb/
H A Dmodedb.rst23 <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
31 - NSTC: 480i output, with the CCIR System-M TV mode and NTSC color encoding
32 - NTSC-J: 480i output, with the CCIR System-M TV mode, the NTSC color
35 - PAL-M: 480i output, with the CCIR System-M TV mode and PAL color encoding
37 If 'M' is specified in the mode_option argument (after <yres> and before
41 If 'i' is specified, calculate for an interlaced mode. And if 'm' is
45 Sample usage: 1024x768M@60m - CVT timing with margins
75 degrees. Valid values are 0, 90, 180 and 270.
77 "PAL-M", "PAL-N", or "SECAM".
125 <pix>M<a>[-R]
[all …]
H A Dfbcon.rst25 Select 'y' to compile support statically or 'm' for module support. The
131 - 3 - counterclockwise orientation (270 degrees)
225 to 'y' or 'm'. Enable one or more of your favorite framebuffer drivers.
/openbmc/linux/drivers/staging/rtl8192u/ieee80211/
H A Drtl819x_HTProc.c24 { {27, 54, 81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540,
26 12, 162, 216, 270, 243, 324, 405, 216, 270, 270, 324, 378, 378, 432, 324, 405,
27 405, 486, 567, 567, 648, 270, 324, 378, 324, 378, 432, 486, 432, 486, 540, 540,
29 {30, 60, 90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600,
30 90, 180, 270, 360, 540, 720, 810, 900, 120, 240, 360, 480, 720, 960, 1080, 1200,
31 13, 180, 240, 300, 270, 360, 450, 240, 300, 300, 360, 420, 420, 480, 360, 450,
142 …IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport Short GI for 20M = %s\n", (pCapELE->ShortGI20Mhz) ? "… in HTDebugHTCapability()
143 …IEEE80211_DEBUG(IEEE80211_DL_HT, "\tSupport Short GI for 40M = %s\n", (pCapELE->ShortGI40Mhz) ? "… in HTDebugHTCapability()
1267 //if in half N mode, set to 20M bandwidth please 09.08.2008 WB. in HTSetConnectBwMode()
/openbmc/linux/drivers/clk/hisilicon/
H A Dcrg-hi3798cv200.c48 { HI3798CV200_FIXED_12M, "12m", NULL, 0, 12000000, },
49 { HI3798CV200_FIXED_24M, "24m", NULL, 0, 24000000, },
50 { HI3798CV200_FIXED_25M, "25m", NULL, 0, 25000000, },
51 { HI3798CV200_FIXED_48M, "48m", NULL, 0, 48000000, },
52 { HI3798CV200_FIXED_50M, "50m", NULL, 0, 50000000, },
53 { HI3798CV200_FIXED_60M, "60m", NULL, 0, 60000000, },
54 { HI3798CV200_FIXED_75M, "75m", NULL, 0, 75000000, },
55 { HI3798CV200_FIXED_100M, "100m", NULL, 0, 100000000, },
56 { HI3798CV200_FIXED_150M, "150m", NULL, 0, 150000000, },
58 { HI3798CV200_FIXED_200M, "200m", NULL, 0, 200000000, },
[all …]
/openbmc/linux/drivers/staging/fbtft/
H A Dfb_ili9163.c8 * .S.U.M.O.T.O.Y. by Max MC Costa (https://github.com/sumotoy/TFT_ILI9163C).
130 case 270: in set_addr_win()
174 case 270: in set_var()
/openbmc/linux/drivers/media/dvb-frontends/
H A Ds5h1411.c143 { 0x387, 270, },
186 { 0x14b5, 270, },
315 { 0x53a0, 270, },
475 enum fe_modulation m) in s5h1411_enable_modulation() argument
479 dprintk("%s(0x%08x)\n", __func__, m); in s5h1411_enable_modulation()
481 if ((state->first_tune == 0) && (m == state->current_modulation)) { in s5h1411_enable_modulation()
487 switch (m) { in s5h1411_enable_modulation()
510 state->current_modulation = m; in s5h1411_enable_modulation()
H A Ds5h1409.c116 { 896, 270, },
160 { 22, 270, },
286 { 92, 270, },
391 enum fe_modulation m) in s5h1409_enable_modulation() argument
395 dprintk("%s(0x%08x)\n", __func__, m); in s5h1409_enable_modulation()
397 switch (m) { in s5h1409_enable_modulation()
418 state->current_modulation = m; in s5h1409_enable_modulation()
/openbmc/u-boot/drivers/video/
H A Dbroadwell_igd.c438 dpdiv = 270; in igd_cdclk_init_haswell()
519 dpdiv = 270; in igd_cdclk_init_broadwell()
631 debug("%s: INT15 function %04x!\n", __func__, M.x86.R_AX); in broadwell_igd_int15_handler()
633 switch (M.x86.R_AX) { in broadwell_igd_int15_handler()
646 M.x86.R_AX = 0x005f; in broadwell_igd_int15_handler()
647 M.x86.R_CX = 0x0000; /* Use video bios default */ in broadwell_igd_int15_handler()
651 debug("Unknown INT15 function %04x!\n", M.x86.R_AX); in broadwell_igd_int15_handler()
/openbmc/linux/arch/mips/boot/dts/ralink/
H A Dmt7621.dtsi69 "50m", "125m", "150m",
70 "250m", "270m";
/openbmc/linux/include/uapi/linux/
H A Dif_arp.h12 * Portions taken from the KA9Q/NOS (v2.00m PA0GRI) source.
53 #define ARPHRD_ROSE 270
/openbmc/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json3 "Unit": "CPU-M-CF",
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
24 "Unit": "CPU-M-CF",
31 "Unit": "CPU-M-CF",
38 "Unit": "CPU-M-CF",
45 "Unit": "CPU-M-CF",
52 "Unit": "CPU-M-CF",
59 "Unit": "CPU-M-CF",
66 "Unit": "CPU-M-CF",
[all …]
/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h346 RISCV_IOMMU_FQ_CAUSE_MSI_PT_CORRUPTED = 270,
410 /* When M == 1 (MRIF mode) */
412 /* When M == 3 (basic mode) */
/openbmc/linux/drivers/clk/samsung/
H A Dclk-pll.c207 /* Maximum lock time can be 270 * PDIV cycles */
208 #define PLL35XX_LOCK_FACTOR (270)
960 u32 r, p, m, s, pll_stat; in samsung_pll2550x_recalc_rate() local
968 m = (pll_stat >> PLL2550X_M_SHIFT) & PLL2550X_M_MASK; in samsung_pll2550x_recalc_rate()
971 fvco *= m; in samsung_pll2550x_recalc_rate()
985 /* Maximum lock time can be 270 * PDIV cycles */
986 #define PLL2550XX_LOCK_FACTOR 270
/openbmc/linux/tools/net/ynl/lib/
H A Dynl.py23 SOL_NETLINK = 270
146 for m in members:
148 if m.type == 'binary':
149 decoded = self.raw[offset:offset+m['len']]
150 offset += m['len']
151 elif m.type in NlAttr.type_formats:
152 format = self.get_format(m.type, m.byte_order)
155 if m.display_hint:
156 decoded = self.formatted_string(decoded, m.display_hint)
157 value[m.name] = decoded
[all …]
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_mipi.c215 {270, 0x04}, {300, 0x14}, {330, 0x05}, {360, 0x15}, in rk_mipi_phy_enable()
256 * given pixelclock is great than 250M, ddrclk will be fix 1500M. in rk_mipi_phy_enable()
/openbmc/linux/drivers/gpu/drm/
H A Ddrm_blend.c4 * Marek Szyprowski <m.szyprowski@samsung.com>
261 * "rotate-270"
280 { __builtin_ffs(DRM_MODE_ROTATE_270) - 1, "rotate-270" }, in drm_plane_create_rotation_property()
/openbmc/linux/drivers/media/pci/tw68/
H A Dtw68-core.c13 * Copyright (C) 2009 William M. Brack
39 MODULE_AUTHOR("William M. Brack");
101 tw_writeb(TW68_CROP_HI, 0x02); /* 21C Hactive m.s. bits */ in tw68_hw_init1()
126 tw_writeb(TW68_SDT, 0x07); /* 270 Enable shadow reg, auto-det */ in tw68_hw_init1()
/openbmc/linux/drivers/gpu/drm/tests/
H A Ddrm_cmdline_parser_test.c297 const char *cmdline = "720x480-24@60m"; in drm_test_cmdline_res_bpp_refresh_margins()
610 const char *cmdline = "720x480,rotate=270"; in drm_test_cmdline_rotate_270()
706 const char *cmdline = "720x480,rotate=270,reflect_x"; in drm_test_cmdline_multiple_options()
856 .cmdline = "m",
908 .cmdline = "NTSC@60m",
992 TV_OPT_TEST(PAL_M, "720x480i,tv_mode=PAL-M", drm_mode_analog_ntsc_480i),

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