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/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/fonts/
H A Dglyphicons-halflings-regular.svg12 …v-224l158 158q7 7 18 8t19 -6l106 -106q7 -8 6 -19t-8 -18l-158 -158h224q10 0 18.5 -7.5t10.5 -17.5q6 …
13 …50 1100h200q21 0 35.5 -14.5t14.5 -35.5v-350h350q21 0 35.5 -14.5t14.5 -35.5v-200q0 -21 -14.5 -35.5t…
15 …6t-3 -14l-120 -160q-6 -8 -18 -14t-22 -6h-125v-100h275q10 0 13 -6t-3 -14l-120 -160q-6 -8 -18 -14t-2…
30 …v-16.5v-16.5q0 -36 -0.5 -57t-6.5 -61t-17 -65t-35 -57t-57 -50.5t-86 -31.5t-120 -13h-178l-2 -100h288…
31 <glyph unicode="&#x2212;" d="M250 700h800q21 0 35.5 -14.5t14.5 -35.5v-200q0 -21 -14.5 -35.5t-35.5 -…
32 …v-150q0 -21 -14.5 -35.5t-35.5 -14.5h-50v-100q0 -91 -49.5 -165.5t-130.5 -109.5q81 -35 130.5 -109.5t…
35 …v-42h-1200v42q0 21 15 39.5t35 18.5h30l468 746l-135 183q-10 16 -5.5 34t20.5 28t34 5.5t28 -20.5l111 …
36 …-13 -5.5t-5 12.5v550q0 10 5 12.5t13 -5.5zM918 618l264 264q8 8 13 5.5t5 -12.5v-550q0 -10 -5 -12.5t-…
38 <glyph unicode="&#xe001;" d="M700 650v-550h250q21 0 35.5 -14.5t14.5 -35.5v-50h-800v50q0 21 14.5 35.…
39 … 163q39 15 63 0t24 -49v-831q0 -55 -41.5 -95.5t-111.5 -63.5q-79 -25 -147 -4.5t-86 75t25.5 111.5t122…
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H A Dfontawesome-webfont.svg34 <glyph unicode="&#xf000;" horiz-adv-x="1792" d="M1699 1350q0 -35 -43 -78l-632 -632v-768h320q26 0 45…
35 …v-1120q0 -50 -34 -89t-86 -60.5t-103.5 -32t-96.5 -10.5t-96.5 10.5t-103.5 32t-86 60.5t-34 89t34 89t8…
37 …v-768q0 -13 9.5 -22.5t22.5 -9.5h1472q13 0 22.5 9.5t9.5 22.5zM1664 1083v11v13.5t-0.5 13 t-3 12.5t-5…
39 …6q-22 -12 -40 -12q-21 0 -31.5 14.5t-10.5 35.5q0 6 2 20l86 500l-364 354q-25 27 -25 48q0 37 56 46l50…
40 …q-22 -12 -40 -12q-21 0 -31.5 14.5t-10.5 35.5q0 6 2 20l86 500 l-364 354q-25 27 -25 48q0 37 56 46l50…
42 …v-128q0 -26 19 -45t45 -19h128q26 0 45 19t19 45zM384 320v128q0 26 -19 45t-45 19h-128q-26 0 -45 -19t…
43 …v-384q0 -52 -38 -90t-90 -38h-512q-52 0 -90 38t-38 90v384q0 52 38 90t90 38h512q52 0 90 -38t38 -90zM…
44 …v-192q0 -40 -28 -68t-68 -28h-320q-40 0 -68 28t-28 68v192q0 40 28 68t68 28h320q40 0 68 -28t28 -68zM…
45 …v-192q0 -40 -28 -68t-68 -28h-320q-40 0 -68 28t-28 68v192q0 40 28 68t68 28h320q40 0 68 -28t28 -68zM…
48 …v-64q0 -13 -9.5 -22.5t-22.5 -9.5h-224v-224q0 -13 -9.5 -22.5t-22.5 -9.5h-64q-13 0 -22.5 9.5t-9.5 22…
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/openbmc/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
H A Dhantro_g1_regs.h50 #define G1_REG_DEC_CTRL0_DIVX3_E BIT(25)
86 #define G1_REG_DEC_CTRL2_SYNC_MARKER_E BIT(25)
129 #define G1_REG_DEC_CTRL3_INIT_QP(x) (((x) & 0x3f) << 25)
139 #define G1_REG_DEC_CTRL4_AVS_H264_H_EXT BIT(25)
158 #define G1_REG_DEC_CTRL4_PJPEG_WDIV8 BIT(25)
206 #define G1_REG_FWD_PIC_PINIT_RLIST_F5(x) (((x) & 0x1f) << 25)
219 #define G1_REG_DEC_CTRL7_PINIT_RLIST_F15(x) (((x) & 0x1f) << 25)
260 #define G1_REG_BD_REF_PIC_BINIT_RLIST_B2(x) (((x) & 0x1f) << 25)
278 #define G1_REG_BD_P_REF_PIC_PINIT_RLIST_F3(x) (((x) & 0x1f) << 25)
313 #define G1_REG_PP_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
[all …]
/openbmc/linux/arch/arm64/crypto/
H A Dsha512-ce-core.S85 ld1 {v\rc1\().2d}, [x4], #16
87 add v5.2d, v\rc0\().2d, v\in0\().2d
88 ext v6.16b, v\i2\().16b, v\i3\().16b, #8
90 ext v7.16b, v\i1\().16b, v\i2\().16b, #8
91 add v\i3\().2d, v\i3\().2d, v5.2d
93 ext v5.16b, v\in3\().16b, v\in4\().16b, #8
94 sha512su0 v\in0\().2d, v\in1\().2d
98 sha512su1 v\in0\().2d, v\in2\().2d, v5.2d
100 add v\i4\().2d, v\i1\().2d, v\i3\().2d
101 sha512h2 q\i3, q\i1, v\i0\().2d
[all …]
/openbmc/u-boot/include/power/
H A Dsandbox_pmic.h67 /* BUCK1 Voltage: min: 0.8V, step: 25mV, max 2.4V */
72 /* BUCK1 Amperage: min: 150mA, step: 25mA, max: 250mA */
77 /* BUCK2 Voltage: min: 0.75V, step: 50mV, max 3.95V */
82 /* LDO1 Voltage: min: 0.8V, step: 25mV, max 2.4V */
92 /* LDO2 Voltage: min: 0.75V, step: 50mV, max 3.95V */
108 #define SANDBOX_BUCK1_PLATNAME "SUPPLY_1.2V"
110 #define SANDBOX_BUCK2_PLATNAME "SUPPLY_3.3V"
113 #define SANDBOX_BUCK3_PLATNAME "buck_SUPPLY_1.5V"
116 #define SANDBOX_LDO1_PLATNAME "VDD_EMMC_1.8V"
118 #define SANDBOX_LDO2_PLATNAME "VDD_LCD_3.3V"
/openbmc/linux/arch/alpha/kernel/
H A Dentry.S75 stq $25, 120($sp)
92 .cfi_rel_offset $25, 120
121 ldq $25, 120($sp)
141 .cfi_restore $25
279 stq $25, 200($sp)
306 .cfi_rel_offset $25, 25*8
338 ldq $25, 200($sp)
365 .cfi_restore $25
687 #define V(n) stt $f##n, FR(n) macro
688 V( 0); V( 1); V( 2); V( 3)
[all …]
/openbmc/linux/Documentation/fb/
H A Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
49 # 25 chars 20 lines
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
66 # 10 chars 25 lines
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
75 geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode
87 # 13 chars 25 lines
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
96 geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode
[all …]
/openbmc/linux/arch/arm64/kvm/hyp/
H A Daarch32.c32 0xAAAA, /* VS == V set */
36 0xAA55, /* GE == (N==V) */
37 0x55AA, /* LT == (N!=V) */
38 0x0A05, /* GT == (!Z && (N==V)) */
39 0xF5FA, /* LE == (Z || (N!=V)) */
82 it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); in kvm_condition_valid32()
108 * IT[7:0] -> CPSR[26:25],CPSR[15:10]
121 itbits |= (cpsr & (0x3 << 25)) >> 25; in kvm_adjust_itstate()
132 cpsr |= (itbits & 0x3) << 25; in kvm_adjust_itstate()
/openbmc/linux/drivers/ata/
H A Dlibata-pata-timings.c31 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
32 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
41 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
42 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
43 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
57 #define ENOUGH(v, unit) (((v)-1)/(unit)+1) argument
58 #define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0) argument
/openbmc/linux/include/linux/spi/
H A Dmxs-spi.h24 #define BM_SSP_CTRL0_READ (1 << 25)
36 #define BM_SSP_CMD0_DBL_DATA_RATE_EN (1 << 25)
58 #define BF_SSP_TIMING_CLOCK_DIVIDE(v) \ argument
59 (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
62 #define BF_SSP_TIMING_CLOCK_RATE(v) \ argument
63 (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
71 #define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ (1 << 25)
86 #define BF_SSP_CTRL1_WORD_LENGTH(v) \ argument
87 (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
93 #define BF_SSP_CTRL1_SSP_MODE(v) \ argument
[all …]
/openbmc/linux/include/linux/
H A Dinet.h12 * $Id: Space.c,v 0.8.4.5 1992/12/12 19:25:04 bir7 Exp $
13 * $Id: arp.c,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
14 * $Id: arp.h,v 0.8.4.6 1993/01/28 22:30:00 bir7 Exp $
15 * $Id: dev.c,v 0.8.4.13 1993/01/23 18:00:11 bir7 Exp $
16 * $Id: dev.h,v 0.8.4.7 1993/01/23 18:00:11 bir7 Exp $
17 * $Id: eth.c,v 0.8.4.4 1993/01/22 23:21:38 bir7 Exp $
18 * $Id: eth.h,v 0.8.4.1 1992/11/10 00:17:18 bir7 Exp $
19 * $Id: icmp.c,v 0.8.4.9 1993/01/23 18:00:11 bir7 Exp $
20 * $Id: icmp.h,v 0.8.4.2 1992/11/15 14:55:30 bir7 Exp $
21 * $Id: ip.c,v 0.8.4.8 1992/12/12 19:25:04 bir7 Exp $
[all …]
/openbmc/linux/drivers/hwmon/
H A Dabituguru3.c191 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
192 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
193 { "MCH 2.5V", 5, 0, 20, 1, 0 },
194 { "ICH 1.05V", 6, 0, 10, 1, 0 },
195 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
196 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
197 { "ATX +5V", 9, 0, 30, 1, 0 },
198 { "+3.3V", 10, 0, 20, 1, 0 },
201 { "System", 25, 1, 1, 1, 0 },
213 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
[all …]
/openbmc/u-boot/drivers/power/
H A DKconfig83 generic 3.3V IO voltage for external devices like the lcd-panal and
84 sdcard interfaces, etc. On most boards dcdc1 is undervolted to 3.0V to
100 On A10(s) / A13 / A20 boards dcdc2 is VDD-CPU and should be 1.4V.
101 On A31 boards dcdc2 is used for VDD-GPU and should be 1.2V.
102 On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V.
104 On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V.
105 On R40 boards dcdc2 is VDD-CPU and should be 1.1V
119 should be 1.25V.
120 On A10s boards with an axp152 dcdc3 is VCC-DRAM and should be 1.5V.
121 On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V.
[all …]
/openbmc/u-boot/board/freescale/common/
H A Dpfuze.c68 /* Set SW1AB stanby volage to 0.975V */ in pfuze_common_init()
74 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ in pfuze_common_init()
80 /* Set SW1C standby voltage to 0.975V */ in pfuze_common_init()
86 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ in pfuze_common_init()
147 /* Set SW1AB stanby volage to 0.975V */ in pfuze_common_init()
153 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ in pfuze_common_init()
159 /* Set SW1C standby voltage to 0.975V */ in pfuze_common_init()
165 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ in pfuze_common_init()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dspl_power_init.c115 * mxs_power_set_linreg() - Set linear regulators 25mV below DC-DC converter
118 * to be 25mV below the VDDIO, VDDA and VDDD output from the DC-DC switching
127 /* Set linear regulator 25mV below switching converter */ in mxs_power_set_linreg()
128 debug("SPL: Setting VDDD 25mV below DC-DC converters\n"); in mxs_power_set_linreg()
133 debug("SPL: Setting VDDA 25mV below DC-DC converters\n"); in mxs_power_set_linreg()
138 debug("SPL: Setting VDDIO 25mV below DC-DC converters\n"); in mxs_power_set_linreg()
165 * This function checks if the battery input voltage is higher than 3.6V and
177 * provided by the 5V input recharging the battery is also sufficient to power
228 * mxs_power_setup_5v_detect() - Start the 5V input detection comparator
230 * This function enables the 5V detection comparator and sets the 5V valid
[all …]
/openbmc/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dcmd_v1.c27 #define CMD_A0_DEV_COUNT(v) FIELD_PREP(W0_MASK(29, 26), v) argument
28 #define CMD_A0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v) argument
29 #define CMD_A0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v) argument
30 #define CMD_A0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v) argument
38 #define CMD_I1_DATA_BYTE_4(v) FIELD_PREP(W1_MASK(63, 56), v) argument
39 #define CMD_I1_DATA_BYTE_3(v) FIELD_PREP(W1_MASK(55, 48), v) argument
40 #define CMD_I1_DATA_BYTE_2(v) FIELD_PREP(W1_MASK(47, 40), v) argument
41 #define CMD_I1_DATA_BYTE_1(v) FIELD_PREP(W1_MASK(39, 32), v) argument
42 #define CMD_I1_DEF_BYTE(v) FIELD_PREP(W1_MASK(39, 32), v) argument
46 #define CMD_I0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v) argument
[all …]
/openbmc/linux/drivers/media/platform/sunxi/sun6i-mipi-csi2/
H A Dsun6i_mipi_csi2_reg.h17 #define SUN6I_MIPI_CSI2_CFG_CHANNEL_MODE(v) ((((v) - 1) << 8) & \ argument
19 #define SUN6I_MIPI_CSI2_CFG_LANE_COUNT(v) (((v) - 1) & GENMASK(1, 0)) argument
36 #define SUN6I_MIPI_CSI2_CH_INT_EN_LINE_SYNC_ERR BIT(25)
53 #define SUN6I_MIPI_CSI2_CH_INT_PD_LINE_SYNC_ERR BIT(25)
/openbmc/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
111 ((v) ? BIT(4) : 0)
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h245 #define MXC_CCM_CBCDR_PERIPH_CLK_SEL (1 << 25)
355 #define MXC_CCM_CSCDR1_VPU_AXI_PODF_MASK (0x7 << 25)
356 #define MXC_CCM_CSCDR1_VPU_AXI_PODF_OFFSET 25
394 #define MXC_CCM_CS1CDR_ESAI_CLK_PODF_MASK (0x3F << 25)
395 #define MXC_CCM_CS1CDR_ESAI_CLK_PODF_OFFSET 25
411 #define MXC_CCM_CS2CDR_QSPI2_CLK_PODF(v) (((v) & 0x3f) << 21) argument
414 #define MXC_CCM_CS2CDR_QSPI2_CLK_PRED(v) (((v) & 0x7) << 18) argument
417 #define MXC_CCM_CS2CDR_QSPI2_CLK_SEL(v) (((v) & 0x7) << 15) argument
421 #define MXC_CCM_CS2CDR_ENFC_CLK_PODF(v) (((v) & 0x3f) << 21) argument
424 #define MXC_CCM_CS2CDR_ENFC_CLK_PRED(v) (((v) & 0x7) << 18) argument
[all …]
/openbmc/linux/lib/crypto/
H A Dcurve25519-fiat32.c20 * fe limbs are bounded by 1.125*2^26,1.125*2^25,1.125*2^26,1.125*2^25,etc.
23 typedef struct fe { u32 v[10]; } fe; member
25 /* fe_loose limbs are bounded by 3.375*2^26,3.375*2^25,3.375*2^26,3.375*2^25,etc
28 typedef struct fe_loose { u32 v[10]; } fe_loose; member
42 h[1] = (a0>>26) | ((a1&((1<<19)-1))<< 6); /* (32-26) + 19 = 6+19 = 25 */ in fe_frombytes_impl()
44 h[3] = (a2>>13) | ((a3&((1<< 6)-1))<<19); /* (32-13) + 6 = 19+ 6 = 25 */ in fe_frombytes_impl()
46 h[5] = a4&((1<<25)-1); /* 25 */ in fe_frombytes_impl()
47 h[6] = (a4>>25) | ((a5&((1<<19)-1))<< 7); /* (32-25) + 19 = 7+19 = 26 */ in fe_frombytes_impl()
48 h[7] = (a5>>19) | ((a6&((1<<12)-1))<<13); /* (32-19) + 12 = 13+12 = 25 */ in fe_frombytes_impl()
50 h[9] = (a7>> 6)&((1<<25)-1); /* 25 */ in fe_frombytes_impl()
[all …]
/openbmc/u-boot/include/
H A Dtps6586x.h28 * @param sm0_target Target voltage for SM0 in 25mW units, 0=725mV, 31=1.5V
29 * @param sm1_target Target voltage for SM1 in 25mW units, 0=725mV, 31=1.5V
30 * @param step Amount to change voltage in each step, in 25mW units
/openbmc/u-boot/include/net/pfe_eth/pfe/cbus/
H A Demac.h38 #define EMAC_IEVENT_RXF BIT(25)
52 #define EMAC_IMASKT_RXF BIT(25)
118 #define EMAC_MII_DATA_RA(v) ((v & EMAC_MII_DATA_RA_MASK) <<\ argument
120 #define EMAC_MII_DATA_PA(v) ((v & EMAC_MII_DATA_RA_MASK) <<\ argument
122 #define EMAC_MII_DATA(v) (v & 0xffff) argument
127 #define EMAC_HOLDTIME(v) ((v & EMAC_HOLDTIME_MASK) << EMAC_HOLDTIME_SHIFT) argument
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dtc_sample.sh63 ip -4 route add default vrf v$h1 nexthop via 192.0.2.2
68 ip -4 route del default vrf v$h1 nexthop via 192.0.2.2
77 ip -4 route add default vrf v$h2 nexthop via 198.51.100.2
82 ip -4 route del default vrf v$h2 nexthop via 198.51.100.2
95 ip -4 route add default vrf v${h3}_bond nexthop via 192.0.2.18
100 ip -4 route del default vrf v${h3}_bond nexthop via 192.0.2.18
116 ip -4 route add default vrf v${h4}_bond nexthop via 198.51.100.18
121 ip -4 route del default vrf v${h4}_bond nexthop via 198.51.100.18
238 ip vrf exec v$h1 $MZ $h1 -c 320000 -d 100usec -p 64 -A 192.0.2.1 \
245 (( -25 <= pct && pct <= 25))
[all …]
/openbmc/linux/drivers/net/wan/
H A DKconfig9 Wide Area Networks (WANs), such as X.25, Frame Relay and leased
37 Relay, synchronous Point-to-Point Protocol (PPP) and X.25.
88 tristate "X.25 protocol support"
91 Generic HDLC driver supporting X.25 over WAN connections.
95 comment "X.25/LAPB support is disabled"
183 Support for the FarSync T-Series X.21 (and V.35/V.24) cards by
187 8Mb/s (128K on V.24) using synchronous PPP, Cisco HDLC, raw HDLC,
188 Frame Relay or X.25/LAPB.
230 # X.25 network drivers

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