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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Darm,malidp.yaml27 maxItems: 1
60 maxItems: 1
102 dp0: malidp@6f200000 {
/openbmc/linux/Documentation/devicetree/bindings/hwmon/
H A Dbaikal,bt1-pvt.yaml53 maxItems: 1
56 maxItems: 1
93 pvt@1f200000 {
/openbmc/u-boot/board/qualcomm/dragonboard820c/
H A Dreadme.txt11 - Environment in EXT4 partition 1 in SD card (check defconfig for details)
19 1) Install mkbootimg and dtbTool from Codeaurora:
68 1) create an EXT4 partition on the SD card (must be partition #1)
95 prompt 1
114 the SD card EXT4 partition#1 should contain:
137 S - OEM Config Row 1 @ 0x00074190 = 0x0000000000000000
139 S - Feature Config Row 1 @ 0x000741a8 = 0x00fff00001ffffff
159 B - 410713 - CDT Version:3,Platform ID:24,Major ID:1,Minor ID:0,Subtype:0
177 B - 522404 - DDR ID, Rank 0, Rank 1, 0x6, 0x300, 0x300
232 [190] use_signed_kernel=1, is_unlocked=1, is_tampered=0.
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/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dgpu.yaml32 - pattern: '^amd,imageon-200\.[0-1]$'
40 minItems: 1
44 minItems: 1
48 maxItems: 1
51 maxItems: 1
54 minItems: 1
58 minItems: 1
64 minItems: 1
69 minItems: 1
72 maxItems: 1
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/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dsdram.c97 seed_checksum |= rtc_read8(dev, CMOS_OFFSET_MRC_SEED_CHK + 1) << 8; in read_seed_from_cmos()
163 rtc_write8(dev, CMOS_OFFSET_MRC_SEED_CHK + 1, (checksum >> 8) & 0xff); in write_seeds_to_cmos()
198 setbits_le32(MCHBAR_REG(0x7010), 1); in post_system_agent_init()
246 * 7f200000 2034MB TOLUD in sdram_find()
331 mrc_add_memory_area(info, 1 << 20, 2 << 28); in sdram_find()
334 mrc_add_memory_area(info, 1ULL << 32, touud); in sdram_find()
348 if (touud > (1ULL << 32ULL)) { in sdram_find()
417 .system_type = 0, /* 0 Mobile, 1 Desktop/Server */ in dram_init()
420 .ec_present = 1, in dram_init()
421 .ddr3lv_support = 1, in dram_init()
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/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi54 CPU1: cpu@1 {
164 #reset-cells = <1>;
200 #clock-cells = <1>;
205 #power-domain-cells = <1>;
374 #address-cells = <1>;
375 #size-cells = <1>;
382 #hwlock-cells = <1>;
666 #clock-cells = <1>;
667 #reset-cells = <1>;
668 #power-domain-cells = <1>;
[all …]
H A Dqcm2290.dtsi60 CPU1: cpu@1 {
152 #reset-cells = <1>;
218 #clock-cells = <1>;
223 #power-domain-cells = <1>;
351 qcom,client-id = <1>;
369 #qcom,smem-state-cells = <1>;
388 qcom,remote-pid = <1>;
392 #qcom,smem-state-cells = <1>;
418 #hwlock-cells = <1>;
630 #clock-cells = <1>;
[all …]
H A Dsm6375.dtsi176 clocks = <&cpufreq_hw 1>;
179 qcom,freq-domain = <&cpufreq_hw 1>;
197 clocks = <&cpufreq_hw 1>;
200 qcom,freq-domain = <&cpufreq_hw 1>;
263 LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
273 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
283 BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
310 #reset-cells = <1>;
624 qcom,client-id = <1>;
663 #clock-cells = <1>;
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H A Dsm6115.dtsi59 CPU1: cpu@1 {
105 clocks = <&cpufreq_hw 1>;
110 qcom,freq-domain = <&cpufreq_hw 1>;
124 clocks = <&cpufreq_hw 1>;
129 qcom,freq-domain = <&cpufreq_hw 1>;
138 clocks = <&cpufreq_hw 1>;
143 qcom,freq-domain = <&cpufreq_hw 1>;
152 clocks = <&cpufreq_hw 1>;
157 qcom,freq-domain = <&cpufreq_hw 1>;
213 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
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