Searched +full:1 +full:c0c000 (Results 1 – 19 of 19) sorted by relevance
62 maxItems: 165 maxItems: 168 minItems: 172 minItems: 178 maxItems: 181 maxItems: 1127 port@1:142 TCON can have 1 or 2 channels, usually with the155 - port@1380 lcd-controller@1c0c000 {[all …]
134 cpu@1 {206 soc@1c00000 {207 tcon0: lcd-controller@1c0c000 {221 #address-cells = <1>;225 #address-cells = <1>;235 tcon0_out: port@1 {236 #address-cells = <1>;238 reg = <1>;240 tcon0_out_dsi: endpoint@1 {241 reg = <1>;[all …]
55 #address-cells = <1>;67 #address-cells = <1>;68 #size-cells = <1>;80 framebuffer@1 {92 #address-cells = <1>;93 #size-cells = <1>;96 osc24M: clk@1c20050 {111 soc@1c00000 {113 #address-cells = <1>;114 #size-cells = <1>;[all …]
53 #address-cells = <1>;54 #size-cells = <1>;57 #address-cells = <1>;58 #size-cells = <1>;81 #address-cells = <1>;82 #size-cells = <1>;116 #address-cells = <1>;117 #size-cells = <1>;128 #clock-cells = <1>;129 #reset-cells = <1>;[all …]
55 #address-cells = <1>;56 #size-cells = <1>;59 #address-cells = <1>;60 #size-cells = <1>;83 #address-cells = <1>;94 cpu1: cpu@1 {97 reg = <1>;190 #address-cells = <1>;191 #size-cells = <1>;197 allwinner,sram = <&de2_sram 1>;[all …]
56 #address-cells = <1>;57 #size-cells = <1>;60 #address-cells = <1>;74 cpu@1 {80 reg = <1>;149 #address-cells = <1>;150 #size-cells = <1>;178 clock-mult = <1>;303 #address-cells = <1>;304 #size-cells = <1>;[all …]
50 #address-cells = <1>;51 #size-cells = <1>;59 #address-cells = <1>;60 #size-cells = <1>;110 #address-cells = <1>;162 #address-cells = <1>;163 #size-cells = <1>;189 #address-cells = <1>;190 #size-cells = <1>;193 sram-controller@1c00000 {[all …]
61 #address-cells = <1>;62 #size-cells = <1>;76 framebuffer@1 {99 #address-cells = <1>;121 cpu@1 {124 reg = <1>;179 #address-cells = <1>;180 #size-cells = <1>;183 osc24M: clk@1c20050 {206 mii_phy_tx_clk: clk@1 {[all …]
61 #address-cells = <1>;62 #size-cells = <1>;76 simplefb_lcd: framebuffer@1 {99 #address-cells = <1>;118 cpu@1 {121 reg = <1>;182 #address-cells = <1>;183 #size-cells = <1>;208 mii_phy_tx_clk: clk@1 {222 gmac_tx_clk: clk@1c200d0 {[all …]
51 #address-cells = <1>;52 #size-cells = <1>;56 #address-cells = <1>;57 #size-cells = <1>;71 #address-cells = <1>;97 #address-cells = <1>;98 #size-cells = <1>;120 #address-cells = <1>;121 #size-cells = <1>;132 #clock-cells = <1>;[all …]
51 #address-cells = <1>;52 #size-cells = <1>;55 #address-cells = <1>;67 #address-cells = <1>;68 #size-cells = <1>;92 #address-cells = <1>;93 #size-cells = <1>;112 #address-cells = <1>;113 #size-cells = <1>;128 #address-cells = <1>;[all …]
53 #address-cells = <1>;54 #size-cells = <1>;57 #address-cells = <1>;58 #size-cells = <1>;90 #address-cells = <1>;99 cpu@1 {102 reg = <1>;107 #address-cells = <1>;108 #size-cells = <1>;130 #address-cells = <1>;[all …]
54 #address-cells = <1>;55 #size-cells = <1>;58 #address-cells = <1>;59 #size-cells = <1>;82 #address-cells = <1>;83 #size-cells = <1>;111 #address-cells = <1>;112 #size-cells = <1>;124 #clock-cells = <1>;125 #reset-cells = <1>;[all …]
50 #address-cells = <1>;51 #size-cells = <1>;59 #address-cells = <1>;60 #size-cells = <1>;110 #address-cells = <1>;161 #address-cells = <1>;162 #size-cells = <1>;192 #address-cells = <1>;193 #size-cells = <1>;208 #address-cells = <1>;[all …]
57 #address-cells = <1>;58 #size-cells = <1>;61 #address-cells = <1>;75 cpu1: cpu@1 {82 reg = <1>;162 #address-cells = <1>;163 #size-cells = <1>;191 clock-mult = <1>;311 #address-cells = <1>;312 #size-cells = <1>;[all …]
54 #address-cells = <1>;55 #size-cells = <1>;62 #address-cells = <1>;63 #size-cells = <1>;100 #address-cells = <1>;118 cpu1: cpu@1 {121 reg = <1>;208 #address-cells = <1>;209 #size-cells = <1>;251 gmac_tx_clk: clk@1c200d0 {[all …]
54 #address-cells = <1>;55 #size-cells = <1>;62 #address-cells = <1>;63 #size-cells = <1>;100 #address-cells = <1>;121 cpu1: cpu@1 {124 reg = <1>;174 #address-cells = <1>;175 #size-cells = <1>;203 #address-cells = <1>;[all …]
18 #address-cells = <1>;19 #size-cells = <1>;22 #address-cells = <1>;23 #size-cells = <1>;46 #address-cells = <1>;60 cpu1: cpu@1 {63 reg = <1>;152 #address-cells = <1>;246 thermal-sensors = <&ths 1>;259 #address-cells = <1>;[all …]
152 qcom,freq-domain = <&cpufreq_hw 1>;159 clocks = <&cpufreq_hw 1>;176 qcom,freq-domain = <&cpufreq_hw 1>;183 clocks = <&cpufreq_hw 1>;200 qcom,freq-domain = <&cpufreq_hw 1>;207 clocks = <&cpufreq_hw 1>;224 qcom,freq-domain = <&cpufreq_hw 1>;231 clocks = <&cpufreq_hw 1>;289 BIG_CPU_SLEEP_0: cpu-sleep-1-0 {308 CLUSTER_SLEEP_AOSS_SLEEP: cluster-sleep-1 {[all …]