Home
last modified time | relevance | path

Searched +full:15 +full:- +full:9 (Results 1 – 25 of 1079) sorted by relevance

12345678910>>...44

/openbmc/linux/arch/powerpc/crypto/
H A Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
49 # vs1 - vs9 - round keys
57 vcipher 15, 15, 19
[all …]
H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 stdu 1,-752(1)
84 SAVE_GPR 15, 120, 1
102 addi 9, 1, 256
103 SAVE_VRS 20, 0, 9
104 SAVE_VRS 21, 16, 9
105 SAVE_VRS 22, 32, 9
[all …]
H A Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
26 # to 9 vectors for multiplications.
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
[all …]
/openbmc/u-boot/lib/zlib/
H A Dtrees.h1 /* header created automatically with -DGEN_TREES_H */
23 {{241},{ 8}}, {{ 9},{ 8}}, {{137},{ 8}}, {{ 73},{ 8}}, {{201},{ 8}},
32 {{ 61},{ 8}}, {{189},{ 8}}, {{125},{ 8}}, {{253},{ 8}}, {{ 19},{ 9}},
33 {{275},{ 9}}, {{147},{ 9}}, {{403},{ 9}}, {{ 83},{ 9}}, {{339},{ 9}},
34 {{211},{ 9}}, {{467},{ 9}}, {{ 51},{ 9}}, {{307},{ 9}}, {{179},{ 9}},
35 {{435},{ 9}}, {{115},{ 9}}, {{371},{ 9}}, {{243},{ 9}}, {{499},{ 9}},
36 {{ 11},{ 9}}, {{267},{ 9}}, {{139},{ 9}}, {{395},{ 9}}, {{ 75},{ 9}},
37 {{331},{ 9}}, {{203},{ 9}}, {{459},{ 9}}, {{ 43},{ 9}}, {{299},{ 9}},
38 {{171},{ 9}}, {{427},{ 9}}, {{107},{ 9}}, {{363},{ 9}}, {{235},{ 9}},
39 {{491},{ 9}}, {{ 27},{ 9}}, {{283},{ 9}}, {{155},{ 9}}, {{411},{ 9}},
[all …]
/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
109 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
27 /* from BPP 4 to 15 in steps of 0.5 */
68 { 9, 9, 9, 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5,
70 { 14, 14, 13, 13, 12, 12, 12, 12, 11, 11, 10, 10, 10, 10, 9, 9, 9, 8, 8,
83 { 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5, 4, 4, 3, 2, 2, 2, 2, 2,
85 { 9, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 5, 4, 4, 3, 3, 3, 3, 3,
87 { 9, 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5, 4, 4, 3, 3, 3, 3, 3,
89 { 10, 10, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 6, 5, 5, 4, 4, 4, 4, 3,
91 { 11, 11, 10, 10, 9, 9, 9, 9, 9, 9, 8, 8, 8, 7, 7, 6, 6, 5, 5, 5, 5, 5,
93 { 12, 11, 11, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 8, 8, 7, 6, 6, 5, 5, 5,
[all …]
/openbmc/linux/include/linux/mfd/wm831x/
H A Dregulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
14 * R16462 (0x404E) - Current Sink 1
18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
29 #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
30 #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
31 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
32 #define WM831X_CS1_ON_RAMP_SHIFT 8 /* CS1_ON_RAMP - [9:8] */
33 #define WM831X_CS1_ON_RAMP_WIDTH 2 /* CS1_ON_RAMP - [9:8] */
[all …]
/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds_crossbar_con.h1 /* SPDX-License-Identifier: GPL-2.0+ */
12 static const int8_t vsc16_tx_amc[8][2] = { {15, 3}, {0, 2}, {7, 4}, {9, 10},
13 {5, 11}, {4, 5}, {2, 6}, {12, 9} };
15 static int8_t vsc16_tx_sfp[8][2] = { {15, 7}, {0, 1}, {7, 8}, {9, 0},
16 {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
18 static int8_t vsc16_tx_4sfp_sgmii_12_56[8][2] = { {15, 7}, {0, 1},
19 {7, 8}, {9, 0}, {2, 14}, {12, 15},
20 {-1, -1}, {-1, -1} };
22 static const int8_t vsc16_tx_4sfp_sgmii_34[8][2] = { {15, 7}, {0, 1},
23 {7, 8}, {9, 0}, {5, 14}, {4, 15},
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-prime.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 * non-Prime version. Therefore we need to update OPPs table and
16 /delete-property/turbo-mode;
20 opp-1600000000 {
21 opp-hz = /bits/ 64 <1600000000>;
22 opp-microvolt = <1350000>;
23 clock-latency-ns = <200000>;
25 opp-1704000000 {
26 opp-hz = /bits/ 64 <1704000000>;
27 opp-microvolt = <1350000>;
[all …]
/openbmc/linux/lib/crypto/
H A Dblake2s-generic.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
[all …]
/openbmc/openbmc/poky/meta/recipes-graphics/xorg-font/xorg-minimal-fonts/misc/
H A Dfonts.dir2 10x20-ISO8859-1.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-1
3 10x20-ISO8859-10.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-10
4 10x20-ISO8859-11.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-11
5 10x20-ISO8859-13.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-13
6 10x20-ISO8859-14.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-14
7 10x20-ISO8859-15.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-15
8 10x20-ISO8859-16.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-16
9 10x20-ISO8859-2.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-2
10 10x20-ISO8859-3.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-3
11 10x20-ISO8859-4.pcf.gz -misc-fixed-medium-r-normal--20-200-75-75-c-100-iso8859-4
[all …]
/openbmc/linux/crypto/
H A Dblake2b_generic.c1 // SPDX-License-Identifier: (GPL-2.0-only OR Apache-2.0)
11 * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
12 * - OpenSSL license : https://www.openssl.org/source/license.html
13 * - Apache 2.0 : https://www.apache.org/licenses/LICENSE-2.0
26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
[all …]
/openbmc/linux/arch/x86/crypto/
H A Dblake2s-core.S1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
4 * Copyright (C) 2017-2019 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved.
22 .byte 0, 2, 4, 6, 1, 3, 5, 7, 14, 8, 10, 12, 15, 9, 11, 13
23 .byte 14, 4, 9, 13, 10, 8, 15, 6, 5, 1, 0, 11, 3, 12, 2, 7
24 .byte 11, 12, 5, 15, 8, 0, 2, 13, 9, 10, 3, 7, 4, 14, 6, 1
25 .byte 7, 3, 13, 11, 9, 1, 12, 14, 15, 2, 5, 4, 8, 6, 10, 0
26 .byte 9, 5, 2, 10, 0, 7, 4, 15, 3, 14, 11, 6, 13, 1, 12, 8
27 .byte 2, 6, 0, 8, 12, 10, 11, 3, 1, 4, 7, 15, 9, 13, 5, 14
28 .byte 12, 1, 14, 4, 5, 15, 13, 10, 8, 0, 6, 9, 11, 7, 3, 2
[all …]
/openbmc/linux/sound/soc/codecs/
H A Drt5616.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5616.h -- RT5616 ALSA SoC audio driver
17 /* I/O - Output */
21 /* I/O - Input */
24 /* I/O - ADC/DAC/DMIC */
28 /* Mixer - D-D */
33 /* Mixer - ADC */
38 /* Mixer - DAC */
57 /* Format - ADC/DAC */
62 /* Function - Analog */
[all …]
H A Drt5651.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5651.h -- RT5651 ALSA SoC audio driver
12 #include <dt-bindings/sound/rt5651.h>
19 /* I/O - Output */
23 /* I/O - Input */
28 /* I/O - ADC/DAC/DMIC */
35 /* Mixer - D-D */
48 /* Mixer - ADC */
53 /* Mixer - DAC */
72 /* Format - ADC/DAC */
[all …]
H A Drt5660.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5660.h -- RT5660 ALSA SoC audio driver
20 /* I/O - Output */
23 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
30 /* Mixer - D-D */
35 /* Mixer - ADC */
40 /* Mixer - DAC */
61 /* Format - ADC/DAC */
66 /* Function - Analog */
[all …]
H A Drt5670.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
[all …]
H A Drt5665.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5665.h -- RT5665/RT5658 ALSA SoC audio driver
21 /* I/O - Output */
30 /* I/O - Input */
36 /* I/O - Speaker */
44 /* I/O - ADC/DAC/DMIC */
58 /* Mixer - D-D */
70 /* Mixer - PDM */
76 /* Mixer - ADC */
88 /* Mixer - DAC */
[all …]
/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_dp_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2019-2022 MediaTek Inc.
21 #define DA_XTP_GLB_CKDET_EN_FORCE_VAL BIT(15)
27 #define DA_CKM_XTAL_CK_FORCE_VAL BIT(9)
38 #define RG_XTP_LN0_TX_IMPSEL_PMOS GENMASK(15, 12)
41 #define RG_XTP_LN1_TX_IMPSEL_PMOS GENMASK(15, 12)
44 #define RG_XTP_LN2_TX_IMPSEL_PMOS GENMASK(15, 12)
47 #define RG_XTP_LN3_TX_IMPSEL_PMOS GENMASK(15, 12)
65 #define DP_TX1_VOLT_SWING_MASK GENMASK(9, 8)
88 #define DP_TX_ENCODER_4P_RESET_SW_DP_ENC0_P0 BIT(9)
[all …]
/openbmc/linux/drivers/pinctrl/stm32/
H A Dpinctrl-stm32f769.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "pinctrl-stm32.h"
20 STM32_FUNCTION(9, "UART4_TX"),
32 STM32_FUNCTION(9, "UART4_RX"),
36 STM32_FUNCTION(15, "LCD_R2"),
47 STM32_FUNCTION(9, "SAI2_SCK_B"),
50 STM32_FUNCTION(15, "LCD_R1"),
64 STM32_FUNCTION(15, "LCD_B5"),
74 STM32_FUNCTION(9, "SPI6_NSS"),
77 STM32_FUNCTION(15, "LCD_VSYNC"),
[all …]
H A Dpinctrl-stm32mp135.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
10 #include "pinctrl-stm32.h"
21 STM32_FUNCTION(9, "UART5_TX"),
98 STM32_FUNCTION(9, "UART4_RTS UART4_DE"),
127 STM32_FUNCTION(9, "SPI2_MOSI I2S2_SDO"),
131 STM32_FUNCTION(15, "LCD_B7"),
135 PINCTRL_PIN(9, "PA9"),
141 STM32_FUNCTION(9, "UART4_TX"),
144 STM32_FUNCTION(15, "LCD_R6"),
[all …]
H A Dpinctrl-stm32h743.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "pinctrl-stm32.h"
21 STM32_FUNCTION(9, "UART4_TX"),
36 STM32_FUNCTION(9, "UART4_RX"),
40 STM32_FUNCTION(15, "LCD_R2"),
52 STM32_FUNCTION(9, "SAI2_SCK_B"),
55 STM32_FUNCTION(15, "LCD_R1"),
70 STM32_FUNCTION(15, "LCD_B5"),
81 STM32_FUNCTION(9, "SPI6_NSS"),
84 STM32_FUNCTION(15, "LCD_VSYNC"),
[all …]
/openbmc/linux/drivers/power/supply/
H A Dbd99954-charger.h1 /* SPDX-License-Identifier: GPL-2.0-only */
484 [F_VBAT_VSYS_STATUS] = REG_FIELD(VBAT_VSYS_STATUS, 0, 15),
490 [F_THERMWDT_VAL] = REG_FIELD(WDT_STATUS, 8, 15),
497 [F_OTG_BOTH_EN] = REG_FIELD(VIN_CTRL_SET, 15, 15),
507 [F_DCP_2500_SEL] = REG_FIELD(CHGOP_SET1, 15, 15),
512 [F_SDP_CHG_TRIG_EN] = REG_FIELD(CHGOP_SET1, 9, 9),
530 [F_WDT_FST] = REG_FIELD(CHGWDT_SET, 8, 15),
532 [F_WDT_IBAT_SHORT] = REG_FIELD(BATTWDT_SET, 8, 15),
549 [F_PROCHOT_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 14, 15),
551 [F_PROCHOT_IDCHG_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 8, 9),
[all …]
/openbmc/linux/arch/arm/crypto/
H A Dblake2s-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 // load the words on-demand.
59 // Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.
61 // columns/diagonals. s0-s1 are the word offsets to the message words the first
62 // column/diagonal needs, and likewise s2-s3 for the second column/diagonal.
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
116 // r14 are free to use. The macro arguments s0-s15 give the order in which the
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
140 // (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).
[all …]
/openbmc/linux/drivers/clk/rockchip/
H A Drst-rk3588.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
33 RK3588_CRU_RESET_OFFSET(SRST_CSIPHY1, 1, 9), // missing in TRM
34 RK3588_CRU_RESET_OFFSET(SRST_A_TOP_M500_BIU, 1, 15),
42 RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY0_CMN, 2, 9),
45 RK3588_CRU_RESET_OFFSET(SRST_USBDP_COMBO_PHY1_INIT, 2, 15),
53 RK3588_CRU_RESET_OFFSET(SRST_P_MIPI_DCPHY0_GRF, 3, 15),
63 RK3588_CRU_RESET_OFFSET(SRST_P_APB2ASB_SLV_EMMCIO, 4, 9),
72 RK3588_CRU_RESET_OFFSET(SRST_H_CHANNEL_SECURE2CENTER, 5, 15),
95 RK3588_CRU_RESET_OFFSET(SRST_M_SPDIF0, 9, 1),
[all …]

12345678910>>...44