| /openbmc/linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-cpu-opp-microvolt.dtsi | 205 opp-1300000000-1000 {
209 opp-1300000000-1025 {
213 opp-1300000000-1050 {
217 opp-1300000000-1075 {
221 opp-1300000000-1100 {
225 opp-1300000000-1125 {
229 opp-1300000000-1150 {
233 opp-1300000000-1175 {
|
| H A D | tegra30-cpu-opp.dtsi | 361 opp-1300000000-1000 {
365 opp-hz = /bits/ 64 <1300000000>;
368 opp-1300000000-1025 {
372 opp-hz = /bits/ 64 <1300000000>;
375 opp-1300000000-1050 {
383 opp-hz = /bits/ 64 <1300000000>;
386 opp-1300000000-1075 {
390 opp-hz = /bits/ 64 <1300000000>;
393 opp-1300000000-1100 {
396 opp-hz = /bits/ 64 <1300000000>;
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/cpufreq/ |
| H A D | imx-cpufreq-dt.txt | 31 opp-1300000000 {
32 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | cpufreq-mediatek.txt | 60 opp-1300000000 {
61 opp-hz = /bits/ 64 <1300000000>;
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | mt7623.dtsi | 34 clock-frequency = <1300000000>;
44 clock-frequency = <1300000000>;
54 clock-frequency = <1300000000>;
64 clock-frequency = <1300000000>;
|
| H A D | uniphier-pxs3.dtsi | 109 opp-1300000000 {
110 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | r8a7790.dtsi | 78 clock-frequency = <1300000000>;
99 clock-frequency = <1300000000>;
120 clock-frequency = <1300000000>;
141 clock-frequency = <1300000000>;
|
| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | power_domain.txt | 85 domain1_opp_1: opp-1300000000 {
86 opp-hz = /bits/ 64 <1300000000>;
|
| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos4212.dtsi | 118 opp-1300000000 {
119 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | exynos5800.dtsi | 51 opp-1300000000 {
105 opp-1300000000 {
|
| H A D | exynos4412.dtsi | 144 opp-1300000000 {
145 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | exynos5420.dtsi | 182 opp-1300000000 {
183 opp-hz = /bits/ 64 <1300000000>;
223 opp-1300000000 {
224 opp-hz = /bits/ 64 <1300000000>;
|
| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | fsl,plldig.yaml | 37 maximum: 1300000000
|
| /openbmc/linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt7623.dtsi | 65 opp-1300000000 {
66 opp-hz = /bits/ 64 <1300000000>;
85 clock-frequency = <1300000000>;
97 clock-frequency = <1300000000>;
109 clock-frequency = <1300000000>;
121 clock-frequency = <1300000000>;
|
| /openbmc/linux/Documentation/devicetree/bindings/opp/ |
| H A D | opp-v2.yaml | 247 opp-1300000000 {
248 opp-hz = /bits/ 64 <1300000000>;
|
| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8516.dtsi | 40 opp-1300000000 {
41 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | mt7622.dtsi | 81 clock-frequency = <1300000000>;
96 clock-frequency = <1300000000>;
|
| /openbmc/linux/drivers/clk/ |
| H A D | clk-plldig.c | 35 #define PLLDIG_MAX_VCO_FREQ 1300000000
|
| H A D | clk-hsdk-pll.c | 71 { 1300000000, 1, 38, 0, 0, 0 },
|
| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-tegra30.c | 312 { 12000000, 1300000000, 975, 9, 1, 8 },
313 { 13000000, 1300000000, 1000, 10, 1, 8 },
314 { 16800000, 1300000000, 928, 12, 1, 8 }, /* actual: 1299.2 MHz */
315 { 19200000, 1300000000, 812, 12, 1, 8 }, /* actual: 1299.2 MHz */
316 { 26000000, 1300000000, 650, 13, 1, 8 },
|
| /openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/ |
| H A D | types.h | 73 #define SC_1300MHZ 1300000000U /* 1.3GHz */
|
| /openbmc/u-boot/arch/arm/include/asm/arch-s32v234/ |
| H A D | mc_cgm_regs.h | 174 #define PLL_MAX_FREQ (1300000000)
|
| /openbmc/linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos5433.dtsi | 278 opp-1300000000 {
279 opp-hz = /bits/ 64 <1300000000>;
320 opp-1300000000 {
321 opp-hz = /bits/ 64 <1300000000>;
|
| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | cpu.c | 370 return is_mx7() ? 1000000000 : 1300000000; in get_cpu_speed_grade_hz()
|
| /openbmc/linux/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-pxs3.dtsi | 121 opp-1300000000 {
122 opp-hz = /bits/ 64 <1300000000>;
|