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/openbmc/linux/arch/arm/mach-davinci/
H A Dda850.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI DA850/OMAP-L138 chip specific setup
5 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
7 * Derived from: arch/arm/mach-davinci/da830.c
16 #include <linux/mfd/da8xx-cfgchip.h>
20 #include <clocksource/timer-davinci.h>
47 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
48 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
49 MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
50 MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
[all …]
/openbmc/linux/arch/powerpc/crypto/
H A Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
49 # vs1 - vs9 - round keys
52 xxlor 19+32, 1, 1
[all …]
H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
14 # 1. a += b; d ^= a; d <<<= 16;
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
80 std 0, 16(1)
81 stdu 1,-752(1)
83 SAVE_GPR 14, 112, 1
84 SAVE_GPR 15, 120, 1
85 SAVE_GPR 16, 128, 1
[all …]
/openbmc/entity-manager/configurations/meta/
H A Dminerva_fanboard_adc_silergy.json8 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_IL",
10 "PwmName": "FCB_$bus - 15 FAN_PWM",
16 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_IL_SPEED_RPM",
23 "Severity": 1,
30 "Severity": 1,
40 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_OL",
42 "PwmName": "FCB_$bus - 15 FAN_PWM",
44 1
47 "Index": 1,
48 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_OL_SPEED_RPM",
[all …]
H A Dminerva_fanboard_adc_ti.json8 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_IL",
10 "PwmName": "FCB_$bus - 15 FAN_PWM",
16 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_IL_SPEED_RPM",
23 "Severity": 1,
30 "Severity": 1,
40 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_OL",
42 "PwmName": "FCB_$bus - 15 FAN_PWM",
44 1
47 "Index": 1,
48 "Name": "FCB_$bus - 15 FAN $bus * 4 - 64 + 1 TACH_OL_SPEED_RPM",
[all …]
H A Dyosemite4_sentineldome_t2_retimer.json9 "ICoefficient": -0.02,
11 "ILimitMin": -50,
14 "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RTM_TEMP_C"
16 "Name": "PID_MB_RETIMER_TEMP_Slot $bus % 15",
20 "PCoefficient": -5.0,
27 "Zone 1"
36 "ICoefficient": -0.035,
38 "ILimitMin": -50,
41 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A0_TEMP_C",
42 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A1_TEMP_C",
[all …]
H A Dyosemite4_sentineldome_t1_retimer.json9 "ICoefficient": -0.02,
11 "ILimitMin": -50,
14 "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RTM_TEMP_C"
16 "Name": "PID_MB_RETIMER_TEMP_Slot $bus % 15",
20 "PCoefficient": -5.0,
27 "Zone 1"
36 "ICoefficient": -0.035,
38 "ILimitMin": -50,
41 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A0_TEMP_C",
42 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A1_TEMP_C",
[all …]
H A Dyosemite4_sentineldome_t2.json9 "ICoefficient": -0.035,
11 "ILimitMin": -50,
14 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A0_TEMP_C",
15 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A1_TEMP_C",
16 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A2_TEMP_C",
17 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A3_TEMP_C",
18 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A4_TEMP_C",
19 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A5_TEMP_C",
20 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A6_TEMP_C",
21 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A7_TEMP_C",
[all …]
H A Dyosemite4_sentineldome_t1.json9 "ICoefficient": -0.035,
11 "ILimitMin": -50,
14 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A0_TEMP_C",
15 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A1_TEMP_C",
16 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A2_TEMP_C",
17 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A3_TEMP_C",
18 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A4_TEMP_C",
19 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A6_TEMP_C",
20 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A7_TEMP_C",
21 "SENTINEL_DOME_SLOT $bus % 15 DIMM_A8_TEMP_C",
[all …]
H A Dyosemite4_wailuafalls.json9 "ICoefficient": -0.02,
11 "ILimitMin": -50,
14 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC1_P0V8_TEMP_C",
15 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC1_PVDDQ_CD_TEMP_C",
16 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC1_P0V85_TEMP_C",
17 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC1_PVDDQ_AB_TEMP_C",
18 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC2_P0V8_TEMP_C",
19 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC2_PVDDQ_CD_TEMP_C",
20 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC2_P0V85_TEMP_C",
21 "WAILUA_FALLS_SLOT $bus % 15 WF_VR_ASIC2_PVDDQ_AB_TEMP_C"
[all …]
/openbmc/linux/include/linux/mfd/wm831x/
H A Dotp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
17 * R30720 (0x7800) - Unique ID 1
19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
24 * R30721 (0x7801) - Unique ID 2
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
[all …]
H A Dregulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
14 * R16462 (0x404E) - Current Sink 1
18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
19 #define WM831X_CS1_ENA_WIDTH 1 /* CS1_ENA */
23 #define WM831X_CS1_DRIVE_WIDTH 1 /* CS1_DRIVE */
27 #define WM831X_CS1_SLPENA_WIDTH 1 /* CS1_SLPENA */
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
29 #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
30 #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
[all …]
/openbmc/u-boot/arch/powerpc/include/asm/
H A Diopin_8xx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
18 u_char port:2; /* port number (A=0, B=1, C=2, D=3) */
19 u_char pin:5; /* port pin (0-31) */
20 u_char flag:1; /* for whatever */
24 #define IOPIN_PORTB 1
32 if (iopin->port == IOPIN_PORTA) { in iopin_set_high()
33 ushort __iomem *datp = &immap->im_ioport.iop_padat; in iopin_set_high()
35 setbits_be16(datp, 1 << (15 - iopin->pin)); in iopin_set_high()
36 } else if (iopin->port == IOPIN_PORTB) { in iopin_set_high()
37 uint __iomem *datp = &immap->im_cpm.cp_pbdat; in iopin_set_high()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dwm5100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm5100.h -- WM5100 ALSA SoC Audio driver
18 #define WM5100_CLK_AIF1 1
27 #define WM5100_CLKSRC_MCLK2 1
36 #define WM5100_FLL1 1
891 * R0 (0x00) - software reset
893 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
894 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
895 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
898 * R1 (0x01) - Device Revision
[all …]
H A Dwm9081.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * wm9081.c -- WM9081 ALSA SoC Audio driver
18 #define WM9081_SYSCLK_MCLK 1 /* Use MCLK without FLL */
88 * R0 (0x00) - Software Reset
90 #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
91 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
92 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
95 * R2 (0x02) - Analogue Lineout
100 #define WM9081_LINEOUT_MUTE_WIDTH 1 /* LINEOUT_MUTE */
104 #define WM9081_LINEOUTZC_WIDTH 1 /* LINEOUTZC */
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dapple_m1_pmu.h1 // SPDX-License-Identifier: GPL-2.0
10 #define SYS_IMP_APL_PMC0_EL1 sys_reg(3, 2, 15, 0, 0)
11 #define SYS_IMP_APL_PMC1_EL1 sys_reg(3, 2, 15, 1, 0)
12 #define SYS_IMP_APL_PMC2_EL1 sys_reg(3, 2, 15, 2, 0)
13 #define SYS_IMP_APL_PMC3_EL1 sys_reg(3, 2, 15, 3, 0)
14 #define SYS_IMP_APL_PMC4_EL1 sys_reg(3, 2, 15, 4, 0)
15 #define SYS_IMP_APL_PMC5_EL1 sys_reg(3, 2, 15, 5, 0)
16 #define SYS_IMP_APL_PMC6_EL1 sys_reg(3, 2, 15, 6, 0)
17 #define SYS_IMP_APL_PMC7_EL1 sys_reg(3, 2, 15, 7, 0)
18 #define SYS_IMP_APL_PMC8_EL1 sys_reg(3, 2, 15, 9, 0)
[all …]
/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds_crossbar_con.h1 /* SPDX-License-Identifier: GPL-2.0+ */
12 static const int8_t vsc16_tx_amc[8][2] = { {15, 3}, {0, 2}, {7, 4}, {9, 10},
15 static int8_t vsc16_tx_sfp[8][2] = { {15, 7}, {0, 1}, {7, 8}, {9, 0},
16 {-1, -1}, {-1, -1}, {-1, -1}, {-1, -1} };
18 static int8_t vsc16_tx_4sfp_sgmii_12_56[8][2] = { {15, 7}, {0, 1},
19 {7, 8}, {9, 0}, {2, 14}, {12, 15},
20 {-1, -1}, {-1, -1} };
22 static const int8_t vsc16_tx_4sfp_sgmii_34[8][2] = { {15, 7}, {0, 1},
23 {7, 8}, {9, 0}, {5, 14}, {4, 15},
24 {-1, -1}, {-1, -1} };
[all …]
/openbmc/u-boot/board/ms7750se/
H A Dlowlevel_init.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 modified from SH-IPL+g
17 #define BCR2_D_VALUE 0x2FFC /* Area 1-6 width: 32/32/32/32/32/16 */
18 #define WCR1_D_VALUE 0x02770771 /* DMA:0 A6:2 A3:0 A0:1 Others:15 */
20 #define WCR2_D_VALUE 0xFFFE4FE7 /* A6:15 A6B:7 A5:15 A5B:7 A4:15
21 A3:2 A2:15 A1:15 A0:6 A0B:7 */
23 #define WCR2_D_VALUE 0x7FFE4FE7 /* A6:3 A6B:7 A5:15 A5B:7 A4:15
24 A3:2 A2:15 A1:15 A0:6 A0B:7 */
26 #define WCR3_D_VALUE 0x01777771 /* A6: 0-1 A5: 1-3 A4: 1-3 A3: 1-3
27 A2: 1-3 A1: 1-3 A0: 0-1 */
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/openbmc/linux/tools/testing/selftests/hid/tests/
H A Dtest_tablet.py2 # SPDX-License-Identifier: GPL-2.0
3 # -*- coding: utf-8 -*-
23 https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/windows-pen-states
37 def from_evdev(cls, evdev) -> "PenState":
58 def apply(self, events) -> "PenState":
91 def valid_transitions(self) -> Tuple["PenState", ...]:
93 for skipping the in-range state, due to historical reasons.
145 self.tippressure = 15
236 def legal_transitions() -> Dict[str, Tuple[PenState, ...]]:
238 we don't have Invert nor Erase bits, so just move in/out-of-range or proximity.
[all …]
H A Dtest_multitouch.py2 # SPDX-License-Identifier: GPL-2.0
3 # -*- coding: utf-8 -*-
20 KERNEL_MODULE = ("hid-multitouch", "hid_multitouch")
24 return 1 << x
29 "SLOT_IS_CONTACTID": BIT(1),
43 "TOUCH_SIZE_SCALING": BIT(15),
65 self.tippressure = 15
109 input_info=(BusType.USB, 1, 2), argument
130 self.max_contacts = 1
155 self.scantime += 1
[all …]
/openbmc/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
34 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
48 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
49 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
54 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
56 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
63 int size = 1024 * (rc_buffer_size + 1); in drm_dsc_dp_rc_buffer_size()
67 return 1 * size; in drm_dsc_dp_rc_buffer_size()
81 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
95 * that span more than 1 byte.
[all …]
/openbmc/linux/tools/accounting/
H A Dgetdelays.c1 // SPDX-License-Identifier: GPL-2.0
4 * Utility to get per-pid and per-tgid delay accounting statistics
12 * gcc -I/usr/src/linux/include getdelays.c -o getdelays
38 #define GENLMSG_PAYLOAD(glh) (NLMSG_PAYLOAD(glh, 0) - GENL_HDRLEN)
40 #define NLA_PAYLOAD(len) (len - NLA_HDRLEN)
76 fprintf(stderr, "getdelays [-dilv] [-w logfile] [-r bufsize] " in usage()
77 "[-m cpumask] [-t tgid] [-p pid]\n"); in usage()
78 fprintf(stderr, " -d: print delayacct stats\n"); in usage()
79 fprintf(stderr, " -i: print IO accounting (works only with -p)\n"); in usage()
80 fprintf(stderr, " -l: listen forever\n"); in usage()
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dcpu32.c2 * QEMU ARM TCG-only CPUs.
8 * SPDX-License-Identifier: GPL-2.0-or-later
13 #include "hw/core/tcg-cpu-ops.h"
22 /* Share AArch32 -cpu max features with AArch64. */
28 t = cpu->isar.id_isar5; in aa32_max_features()
30 t = FIELD_DP32(t, ID_ISAR5, SHA1, 1); /* FEAT_SHA1 */ in aa32_max_features()
31 t = FIELD_DP32(t, ID_ISAR5, SHA2, 1); /* FEAT_SHA256 */ in aa32_max_features()
32 t = FIELD_DP32(t, ID_ISAR5, CRC32, 1); in aa32_max_features()
33 t = FIELD_DP32(t, ID_ISAR5, RDM, 1); /* FEAT_RDM */ in aa32_max_features()
34 t = FIELD_DP32(t, ID_ISAR5, VCMA, 1); /* FEAT_FCMA */ in aa32_max_features()
[all …]
/openbmc/linux/lib/zstd/compress/
H A Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
23 static const ZSTD_compressionParameters ZSTD_defaultCParameters[4][ZSTD_MAX_CLEVEL+1] = {
24 { /* "default" - for any srcSize > 256 KB */
26 { 19, 12, 13, 1, 6, 1, ZSTD_fast }, /* base for negative levels */
27 { 19, 13, 14, 1, 7, 0, ZSTD_fast }, /* level 1 */
28 { 20, 15, 16, 1, 6, 0, ZSTD_fast }, /* level 2 */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
[all …]
/openbmc/qemu/target/arm/
H A Dcortex-regs.c2 * ARM Cortex-A registers
6 * SPDX-License-Identifier: GPL-2.0-or-later
23 * all you can report in this two-bit field. Saturate to in l2ctlr_read()
26 return MIN(cpu->core_count - 1, 3) << 24; in l2ctlr_read()
31 .opc0 = 3, .opc1 = 1, .crn = 11, .crm = 0, .opc2 = 2,
35 .cp = 15, .opc1 = 1, .crn = 9, .crm = 0, .opc2 = 2,
39 .opc0 = 3, .opc1 = 1, .crn = 11, .crm = 0, .opc2 = 3,
42 .cp = 15, .opc1 = 1, .crn = 9, .crm = 0, .opc2 = 3,
45 .opc0 = 3, .opc1 = 1, .crn = 15, .crm = 0, .opc2 = 0,
48 .opc0 = 3, .opc1 = 1, .crn = 15, .crm = 2, .opc2 = 0,
[all …]

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