Home
last modified time | relevance | path

Searched +full:0 +full:xfffe (Results 1 – 25 of 230) sorted by relevance

12345678910

/openbmc/linux/drivers/media/i2c/
H A Drdacm21.c28 #define OV490_I2C_ADDRESS 0x24
30 #define OV490_PAGE_HIGH_REG 0xfffd
31 #define OV490_PAGE_LOW_REG 0xfffe
37 #define OV490_SCCB_SLAVE_WRITE 0x00
38 #define OV490_SCCB_SLAVE_READ 0x01
39 #define OV490_SCCB_SLAVE0_DIR 0x80195000
40 #define OV490_SCCB_SLAVE0_ADDR_HIGH 0x80195001
41 #define OV490_SCCB_SLAVE0_ADDR_LOW 0x80195002
43 #define OV490_DVP_CTRL3 0x80286009
45 #define OV490_ODS_CTRL_FRAME_OUTPUT_EN 0x0c
[all …]
/openbmc/linux/fs/smb/server/mgmt/
H A Dksmbd_ida.h14 * The value 0xFFFF MUST NOT be used as a valid TID. All other
15 * possible values for TID, including zero (0x0000), are valid.
16 * The value 0xFFFF is used to specify all TIDs or no TID,
23 * The value 0xFFFE was declared reserved in the LAN Manager 1.0
24 * documentation, so a value of 0xFFFE SHOULD NOT be used as a
26 * zero (0x0000), are valid.
H A Dksmbd_ida.c17 id = __acquire_id(ida, 1, 0xFFFFFFFF); in ksmbd_acquire_smb2_tid()
26 id = __acquire_id(ida, 1, 0); in ksmbd_acquire_smb2_uid()
27 if (id == 0xFFFE) in ksmbd_acquire_smb2_uid()
28 id = __acquire_id(ida, 1, 0); in ksmbd_acquire_smb2_uid()
35 return __acquire_id(ida, 1, 0); in ksmbd_acquire_async_msg_id()
40 return __acquire_id(ida, 0, 0); in ksmbd_acquire_id()
/openbmc/qemu/hw/intc/
H A Dgrlib_irqmp.c45 #define LEVEL_OFFSET 0x00
46 #define PENDING_OFFSET 0x04
47 #define FORCE0_OFFSET 0x08
48 #define CLEAR_OFFSET 0x0C
49 #define MP_STATUS_OFFSET 0x10
50 #define BROADCAST_OFFSET 0x14
51 #define MASK_OFFSET 0x40
52 #define FORCE_OFFSET 0x80
53 #define EXTENDED_OFFSET 0xC0
97 for (i = 0; i < state->parent->ncpus; i++) { in grlib_irqmp_check_irqs()
[all …]
/openbmc/linux/arch/x86/include/uapi/asm/
H A Dboot.h6 #define NORMAL_VGA 0xffff /* 80x25 mode */
7 #define EXTENDED_VGA 0xfffe /* 80x50 mode */
8 #define ASK_VGA 0xfffd /* ask for it at bootup */
/openbmc/qemu/tests/tcg/openrisc/
H A Dtest_sub.c8 a = 0x100; in main()
9 b = 0x100; in main()
10 result = 0x0; in main()
12 ("l.sub %0, %0, %1\n\t" in main()
21 a = 0xffff; in main()
22 b = 0x1; in main()
23 result = 0xfffe; in main()
25 ("l.sub %0, %0, %1\n\t" in main()
34 return 0; in main()
/openbmc/qemu/util/
H A Dunicode.c18 if (codepoint > 0x10FFFFu) { in is_valid_codepoint()
21 if ((codepoint >= 0xFDD0 && codepoint <= 0xFDEF) in is_valid_codepoint()
22 || (codepoint & 0xFFFE) == 0xFFFE) { in is_valid_codepoint()
25 if (codepoint >= 0xD800 && codepoint <= 0xDFFF) { in is_valid_codepoint()
44 * If @s points to an impossible byte (0xFE or 0xFF) or a continuation
64 static int min_cp[5] = { 0x80, 0x800, 0x10000, 0x200000, 0x4000000 }; in mod_utf8_codepoint()
69 if (n == 0 || *s == 0) { in mod_utf8_codepoint()
77 if (byte < 0x80) { in mod_utf8_codepoint()
79 } else if (byte >= 0xFE) { in mod_utf8_codepoint()
80 cp = -1; /* impossible bytes 0xFE, 0xFF */ in mod_utf8_codepoint()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Ddma-controller.yaml26 reg = <0x48000000 0x1000>;
27 interrupts = <0 12 0x4>,
28 <0 13 0x4>,
29 <0 14 0x4>,
30 <0 15 0x4>;
34 dma-channel-mask = <0xfffe>;
/openbmc/linux/include/net/
H A Daf_ieee802154.h18 IEEE802154_ADDR_NONE = 0x0,
19 /* RESERVED = 0x01, */
20 IEEE802154_ADDR_SHORT = 0x2, /* 16-bit address + PANid */
21 IEEE802154_ADDR_LONG = 0x3, /* 64-bit address + PANid */
36 #define IEEE802154_PANID_BROADCAST 0xffff
37 #define IEEE802154_ADDR_BROADCAST 0xffff
38 #define IEEE802154_ADDR_UNDEF 0xfffe
46 #define SOL_IEEE802154 0
48 #define WPAN_WANTACK 0
53 #define WPAN_SECURITY_DEFAULT 0
/openbmc/u-boot/arch/nios2/include/asm/
H A Dsystem.h17 "andi r8, r8, 0xfffe\n" \
23 "mov %0, r8\n" \
27 "mov r8, %0\n" \
33 while (0)
39 ((flags & NIOS2_STATUS_PIE_MSK) == 0x0); \
44 "callr %0" \
/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dpci_hw.h14 #define MLXSW_PCI_CIR_BASE 0x71000
16 #define MLXSW_PCI_CIR_IN_PARAM_LO (MLXSW_PCI_CIR_BASE + 0x04)
17 #define MLXSW_PCI_CIR_IN_MODIFIER (MLXSW_PCI_CIR_BASE + 0x08)
18 #define MLXSW_PCI_CIR_OUT_PARAM_HI (MLXSW_PCI_CIR_BASE + 0x0C)
19 #define MLXSW_PCI_CIR_OUT_PARAM_LO (MLXSW_PCI_CIR_BASE + 0x10)
20 #define MLXSW_PCI_CIR_TOKEN (MLXSW_PCI_CIR_BASE + 0x14)
21 #define MLXSW_PCI_CIR_CTRL (MLXSW_PCI_CIR_BASE + 0x18)
30 #define MLXSW_PCI_FW_READY 0xA1844
31 #define MLXSW_PCI_FW_READY_MASK 0xFFFF
32 #define MLXSW_PCI_FW_READY_MAGIC 0x5E
[all …]
/openbmc/qemu/tests/tcg/aarch64/
H A Dmte.h21 # define PR_TAGGED_ADDR_ENABLE (1UL << 0)
25 # define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
32 # define PROT_MTE 0x20
43 PR_TAGGED_ADDR_ENABLE | tcf | (0xfffe << PR_MTE_TAG_SHIFT), in enable_mte()
44 0, 0, 0); in enable_mte()
45 if (r < 0) { in enable_mte()
55 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); in alloc_mte_mem()
H A Dmte-8.c25 #define PROT_MTE 0x20
32 asm("irg %0, %1" : "=r" (__val) : "r" (ptr)); \
40 asm volatile("stg %0, [%0]" : : "r" (tagged_addr) : "memory"); \
41 } while (0)
62 (0xfffe << PR_MTE_TAG_SHIFT), in main()
63 0, 0, 0)) { in main()
68 a = mmap(0, page_sz, PROT_READ | PROT_WRITE, in main()
69 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); in main()
86 /* access with the default tag (0) */ in main()
87 a[0] = 1; in main()
[all …]
/openbmc/u-boot/net/
H A Dchecksum.c18 sum = 0; in compute_ip_checksum()
24 oddbyte = 0; in compute_ip_checksum()
25 ((u8 *)&oddbyte)[0] = *(u8 *)ptr; in compute_ip_checksum()
26 ((u8 *)&oddbyte)[1] = 0; in compute_ip_checksum()
29 sum = (sum >> 16) + (sum & 0xffff); in compute_ip_checksum()
31 sum = ~sum & 0xffff; in compute_ip_checksum()
40 sum = ~sum & 0xffff; in add_ip_checksums()
41 new = ~new & 0xffff; in add_ip_checksums()
47 new = ((new >> 8) & 0xff) | ((new << 8) & 0xff00); in add_ip_checksums()
50 if (checksum > 0xffff) in add_ip_checksums()
[all …]
/openbmc/linux/drivers/gpu/drm/gma500/
H A Dpsb_device.c23 return 0; in psb_output_init()
35 #define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE
36 #define PSB_BLC_MIN_PWM_REG_FREQ 0x2
38 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
77 return 0; in psb_backlight_setup()
138 return 0; in psb_save_display_registers()
167 PSB_WVDC32(0x80000000, VGACNTRL); in psb_restore_display_registers()
183 return 0; in psb_restore_display_registers()
188 return 0; in psb_power_down()
193 return 0; in psb_power_up()
[all …]
/openbmc/linux/include/linux/mtd/
H A Dnftl.h15 #define BLOCK_NIL 0xffff /* last block of a chain */
16 #define BLOCK_FREE 0xfffe /* free block */
17 #define BLOCK_NOTEXPLORED 0xfffd /* non explored block, only used during mounting */
18 #define BLOCK_RESERVED 0xfffc /* bios block or bad block */
/openbmc/u-boot/drivers/spi/
H A Drk_spi.c25 #define DEBUG_RK_SPI 0
74 writel(enable ? 1 : 0, &regs->enr); in rkspi_enable_chip()
92 if (clk_div > 0xfffe) { in rkspi_set_clk()
93 clk_div = 0xfffe; in rkspi_set_clk()
99 clk_div = (clk_div + 1) & 0xfffe; in rkspi_set_clk()
103 clrsetbits_le32(&priv->regs->baudr, 0xffff, clk_div); in rkspi_set_clk()
111 start = get_timer(0); in rkspi_wait_till_not_busy()
119 return 0; in rkspi_wait_till_not_busy()
151 writel(0, &regs->ser); in spi_cs_deactivate()
166 plat->base = dtplat->reg[0]; in conv_of_platdata()
[all …]
/openbmc/linux/drivers/firmware/efi/libstub/
H A Dsmbios.c30 u16 handle = 0xfffe; in efi_get_smbios_record()
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h10 #define RKCLK_PLL_MODE_SLOW 0
67 clk_div = (clk_div + 1) & 0xfffe; in clk_get_divisor()
99 * @return 0 success, or error value
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dr600_dma.c60 return (rptr & 0x3fffc) >> 2; in r600_dma_get_rptr()
74 return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2; in r600_dma_get_wptr()
88 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
117 * Returns 0 for success, error for failure.
126 WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0); in r600_dma_resume()
127 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0); in r600_dma_resume()
138 WREG32(DMA_RB_RPTR, 0); in r600_dma_resume()
139 WREG32(DMA_RB_WPTR, 0); in r600_dma_resume()
143 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); in r600_dma_resume()
145 ((rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFFFFFFFC)); in r600_dma_resume()
[all …]
/openbmc/linux/net/smc/
H A Dsmc_ism.h18 #define SMC_VIRTUAL_ISM_CHID_MASK 0xFF00
63 return rc < 0 ? rc : 0; in smc_ism_write()
68 /* CHIDs in range of 0xFF00 to 0xFFFF are reserved in __smc_ism_is_virtual()
71 * loopback-ism: 0xFFFF in __smc_ism_is_virtual()
72 * virtio-ism: 0xFF00 ~ 0xFFFE in __smc_ism_is_virtual()
74 return ((chid & 0xFF00) == 0xFF00); in __smc_ism_is_virtual()
/openbmc/qemu/include/sysemu/
H A Dspdm-socket.h62 #define SPDM_SOCKET_COMMAND_NORMAL 0x0001
63 #define SPDM_SOCKET_COMMAND_OOB_ENCAP_KEY_UPDATE 0x8001
64 #define SPDM_SOCKET_COMMAND_CONTINUE 0xFFFD
65 #define SPDM_SOCKET_COMMAND_SHUTDOWN 0xFFFE
66 #define SPDM_SOCKET_COMMAND_UNKOWN 0xFFFF
67 #define SPDM_SOCKET_COMMAND_TEST 0xDEAD
69 #define SPDM_SOCKET_TRANSPORT_TYPE_MCTP 0x01
70 #define SPDM_SOCKET_TRANSPORT_TYPE_PCI_DOE 0x02
72 #define SPDM_SOCKET_MAX_MESSAGE_BUFFER_SIZE 0x1200
/openbmc/linux/arch/x86/include/asm/
H A Dbug.h12 #define ASM_UD2 ".byte 0x0f, 0x0b"
13 #define INSN_UD2 0x0b0f
19 #define INSN_ASOP 0x67
20 #define OPCODE_ESCAPE 0x0f
21 #define SECOND_BYTE_OPCODE_UD1 0xb9
22 #define SECOND_BYTE_OPCODE_UD2 0x0b
24 #define BUG_NONE 0xffff
25 #define BUG_UD1 0xfffe
26 #define BUG_UD2 0xfffd
52 } while (0)
[all …]
/openbmc/linux/drivers/watchdog/
H A Dibmasr.c36 #define TOPAZ_ASR_TOGGLE 0x40
37 #define TOPAZ_ASR_DISABLE 0x80
40 #define PEARL_BASE 0xe04
41 #define PEARL_WRITE 0xe06
42 #define PEARL_READ 0xe07
44 #define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
45 #define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
48 #define JASPER_ASR_REG_OFFSET 0x38
50 #define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
51 #define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
[all …]
/openbmc/linux/drivers/net/wireless/intersil/orinoco/
H A Dhermes_rid.h7 #define HERMES_RID_CNFPORTTYPE 0xFC00
8 #define HERMES_RID_CNFOWNMACADDR 0xFC01
9 #define HERMES_RID_CNFDESIREDSSID 0xFC02
10 #define HERMES_RID_CNFOWNCHANNEL 0xFC03
11 #define HERMES_RID_CNFOWNSSID 0xFC04
12 #define HERMES_RID_CNFOWNATIMWINDOW 0xFC05
13 #define HERMES_RID_CNFSYSTEMSCALE 0xFC06
14 #define HERMES_RID_CNFMAXDATALEN 0xFC07
15 #define HERMES_RID_CNFWDSADDRESS 0xFC08
16 #define HERMES_RID_CNFPMENABLED 0xFC09
[all …]

12345678910