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Searched +full:0 +full:xfff3c200 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/arm/calxeda/
H A Dl2ecc.yaml40 reg = <0xfff3c200 0x100>;
41 interrupts = <0 71 4>, <0 72 4>;
/openbmc/u-boot/board/highbank/
H A Dhighbank.c14 #define HB_AHCI_BASE 0xffe08000
16 #define HB_SCU_A9_PWR_STATUS 0xfff10008
17 #define HB_SREG_A9_PWR_REQ 0xfff3cf00
18 #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
19 #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
20 #define HB_SREG_A15_PWR_CTRL 0xfff3c200
22 #define HB_PWR_SUSPEND 0
27 #define PWRDOM_STAT_SATA 0x80000000
28 #define PWRDOM_STAT_PCI 0x40000000
29 #define PWRDOM_STAT_EMMC 0x20000000
[all …]
/openbmc/linux/arch/arm/boot/dts/calxeda/
H A Dhighbank.dts9 /memreserve/ 0x00000000 0x0001000;
19 #size-cells = <0>;
24 reg = <0x900>;
43 reg = <0x901>;
62 reg = <0x902>;
81 reg = <0x903>;
98 memory@0 {
101 reg = <0x00000000 0xff900000>;
105 ranges = <0x00000000 0x00000000 0xffffffff>;
109 reg = <0xfff00000 0x1000>;
[all …]