Searched +full:0 +full:xfff3c000 (Results 1 – 3 of 3) sorted by relevance
37 reg = <0xfff3c000 0x1000>;41 #size-cells = <0>;44 #clock-cells = <0>;
14 cpu_suspend = <0x84000002>;15 cpu_off = <0x84000004>;16 cpu_on = <0x84000006>;27 reg = <0xffe08000 0x10000>;28 interrupts = <0 83 4>;30 calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,35 calxeda,led-order = <4 0 1 2 3>;40 reg = <0xffe0e000 0x1000>;41 interrupts = <0 90 4>;48 reg = <0xfff20000 0x1000>;[all …]
41 #define SMP_BOOT_ADDR 0x10042 #define SMP_BOOT_REG 0x4043 #define MPCORE_PERIPHBASE 0xfff1000045 #define MVBAR_ADDR 0x20052 #define NUM_REGS 0x20058 if (offset == 0xf00) { in hb_regs_write()68 "highbank: bad write offset 0x%" HWADDR_PRIx "\n", offset); in hb_regs_write()82 "highbank: bad read offset 0x%" HWADDR_PRIx "\n", offset); in hb_regs_read()83 return 0; in hb_regs_read()87 if ((offset == 0x100) || (offset == 0x108) || (offset == 0x10C)) { in hb_regs_read()[all …]