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Searched +full:0 +full:xffd10000 (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dintel,stratix10.yaml33 reg = <0xffd10000 0x1000>;
H A Dintel,easic-n5x.yaml42 reg = <0xffd10000 0x1000>;
H A Dintel,agilex.yaml42 reg = <0xffd10000 0x1000>;
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dbase_addr_s10.h9 #define SOCFPGA_CCU_ADDRESS 0xf7000000
10 #define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400
11 #define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000
12 #define SOCFPGA_SDR_ADDRESS 0xf8011000
13 #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020100
14 #define SOCFPGA_SMMU_ADDRESS 0xfa000000
15 #define SOCFPGA_MAILBOX_ADDRESS 0xffa30000
16 #define SOCFPGA_UART0_ADDRESS 0xffc02000
17 #define SOCFPGA_UART1_ADDRESS 0xffc02100
18 #define SOCFPGA_SPTIMER0_ADDRESS 0xffc03000
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi35 #clock-cells = <0>;
44 #clock-cells = <0>;
53 #clock-cells = <0>;
64 i_clk_mgr: clock_manager@0xffd04000 {
67 reg = <0xffd04000 0x00000200>;
73 vco0-psrc = <0>; /* Field: vco0.psrc */
76 mpuclk-cnt = <0>; /* Field: mpuclk.cnt */
77 mpuclk-src = <0>; /* Field: mpuclk.src */
78 nocclk-cnt = <0>; /* Field: nocclk.cnt */
79 nocclk-src = <0>; /* Field: nocclk.src */
[all …]
H A Dsocfpga_stratix10.dtsi17 #size-cells = <0>;
19 cpu0: cpu@0 {
23 reg = <0x0>;
30 reg = <0x1>;
37 reg = <0x2>;
44 reg = <0x3>;
50 interrupts = <0 120 8>,
51 <0 121 8>,
52 <0 122 8>,
53 <0 123 8>;
[all …]
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg12 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
13 # bit 3-0: MPPSel0 2, NF_IO[2]
20 # bit 31-28: MPPSel7 0, GPO[7]
22 DATA 0xFFD10004 0x03303300
24 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
25 # bit 3-0: MPPSel16 0, GPIO[16]
26 # bit 7-4: MPPSel17 0, GPIO[17]
27 # bit 12-8: MPPSel18 1, NF_IO[0]
29 # bit 19-16: MPPSel20 0, GPIO[20]
30 # bit 23-20: MPPSel21 0, GPIO[21]
[all …]
H A Dkwbimage-memphis.cfg15 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
16 # bit 3-0: MPPSel0 2, NF_IO[2]
23 # bit 31-28: MPPSel7 0, GPO[7]
25 DATA 0xFFD10004 0x03303300
27 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
28 # bit 3-0: MPPSel16 0, GPIO[16]
29 # bit 7-4: MPPSel17 0, GPIO[17]
30 # bit 12-8: MPPSel18 1, NF_IO[0]
32 # bit 19-16: MPPSel20 0, GPIO[20]
33 # bit 23-20: MPPSel21 0, GPIO[21]
[all …]
H A Dkwbimage_256M8_1.cfg19 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
27 # bit 31-28: 0, MPPSel7 GPO[7]
29 DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
30 # bit 3-0: 0, MPPSel8 GPIO[8] CPU_SDA bitbanged
31 # bit 7-4: 0, MPPSel9 GPIO[9] CPU_SCL bitbanged
34 # bit 19-16: 0, MPPSel12 not connected
37 # bit 31-28: 0, MPPSel15 GPIO[16] BOOT_FL_SEL (SPI-MUX Signal)
39 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
40 # bit 3-0: 0, MPPSel16 GPIO[16]
[all …]
H A Dkwbimage_128M16_1.cfg19 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
27 # bit 31-28: 0, MPPSel7 GPO[7]
29 DATA 0xFFD10004 0x03303300 # MPP Control 1 Register
30 # bit 3-0: 0, MPPSel8 GPIO[8]
31 # bit 7-4: 0, MPPSel9 GPIO[9]
34 # bit 19-16: 0, MPPSel12 not connected
37 # bit 31-28: 0, MPPSel15 GPIO[15]
39 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
40 # bit 3-0: 0, MPPSel16 GPIO[16]
[all …]
/openbmc/linux/drivers/hid/
H A Dhid-google-hammer.c78 if (ret >= 0) { in cbas_ec_query_base()
85 ret = 0; in cbas_ec_query_base()
111 pm_wakeup_event(cbas_ec.dev, 0); in cbas_ec_notify()
165 return 0; in cbas_ec_resume()
237 return 0; in __cbas_ec_probe()
269 return 0; in cbas_ec_remove()
273 { "GOOG000B", 0 },
313 led->buf[0] = 0; in hammer_kbd_brightness_set_blocking()
321 if (ret < 0) { in hammer_kbd_brightness_set_blocking()
328 ret = hid_hw_raw_request(led->hdev, 0, led->buf, in hammer_kbd_brightness_set_blocking()
[all …]
/openbmc/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi21 service_reserved: svcbuffer@0 {
23 reg = <0x0 0x0 0x0 0x1000000>;
24 alignment = <0x1000>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
37 reg = <0x0>;
44 reg = <0x1>;
51 reg = <0x2>;
58 reg = <0x3>;
64 interrupts = <0 170 4>,
[all …]
/openbmc/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi22 service_reserved: svcbuffer@0 {
24 reg = <0x0 0x0 0x0 0x2000000>;
25 alignment = <0x1000>;
32 #size-cells = <0>;
34 cpu0: cpu@0 {
38 reg = <0x0>;
45 reg = <0x1>;
52 reg = <0x2>;
59 reg = <0x3>;
85 reg = <0x0 0xfffc1000 0x0 0x1000>,
[all …]
/openbmc/linux/include/linux/
H A Dhid.h57 #define HID_ITEM_FORMAT_SHORT 0
70 #define HID_ITEM_TYPE_MAIN 0
89 #define HID_MAIN_ITEM_CONSTANT 0x001
90 #define HID_MAIN_ITEM_VARIABLE 0x002
91 #define HID_MAIN_ITEM_RELATIVE 0x004
92 #define HID_MAIN_ITEM_WRAP 0x008
93 #define HID_MAIN_ITEM_NONLINEAR 0x010
94 #define HID_MAIN_ITEM_NO_PREFERRED 0x020
95 #define HID_MAIN_ITEM_NULL_STATE 0x040
96 #define HID_MAIN_ITEM_VOLATILE 0x080
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7757.c30 DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */
31 DEFINE_RES_IRQ(evt2irq(0x700)),
36 .id = 0,
50 DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */
51 DEFINE_RES_IRQ(evt2irq(0xb80)),
70 DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */
71 DEFINE_RES_IRQ(evt2irq(0xf00)),
89 DEFINE_RES_MEM(0xfe430000, 0x20),
90 DEFINE_RES_IRQ(evt2irq(0x580)),
91 DEFINE_RES_IRQ(evt2irq(0x5a0)),
[all …]