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Searched +full:0 +full:xff770000 (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/arm/mach-rockchip/
H A Drk3288-board-tpl.c21 #define GRF_BASE 0xff770000
40 * printhex8(0x1234); in board_init_f()
60 ret = uclass_get_device(UCLASS_RAM, 0, &dev); in board_init_f()
H A Drk3368-board-tpl.c39 const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100; in sgrf_busdmac_addr()
49 const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0); in sgrf_init()
67 rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC); in sgrf_init()
90 (struct rk3368_grf * const)0xff770000; in board_debug_uart_init()
94 GPIO2D1_GPIO = 0, in board_debug_uart_init()
97 GPIO2D0_MASK = GENMASK(1, 0), in board_debug_uart_init()
98 GPIO2D0_GPIO = 0, in board_debug_uart_init()
99 GPIO2D0_UART0_SIN = (1 << 0), in board_debug_uart_init()
102 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) in board_debug_uart_init()
123 * printhex8(0x1234); in board_init_f()
[all …]
H A Drk3288-board-spl.c50 if (node < 0) { in spl_boot_device()
103 return 0; in phycore_init()
115 #define GRF_BASE 0xff770000 in board_init_f()
127 * printhex8(0x1234); in board_init_f()
160 ret = uclass_get_device(UCLASS_RAM, 0, &dev); in board_init_f()
181 return 0; in setup_led()
192 return 0; in setup_led()
214 #define PMU_BASE 0xff730000
220 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
221 gd->bd->bi_dram[0].size = size; in dram_init_banksize()
[all …]
H A Drk3399-board-spl.c74 for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i) in spl_decode_boot_device()
101 chosen = fdt_find_or_add_subnode(blob, 0, "chosen"); in spl_perform_fixups()
102 if (chosen < 0) { in spl_perform_fixups()
110 #define TIMER_CHN10_BASE 0xff8680a0
111 #define TIMER_END_COUNT_L 0x00
112 #define TIMER_END_COUNT_H 0x04
113 #define TIMER_INIT_COUNT_L 0x10
114 #define TIMER_INIT_COUNT_H 0x14
115 #define TIMER_CONTROL_REG 0x1c
117 #define TIMER_EN 0x1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml171 "phy@[0-9a-f]+$":
214 "usb2phy@[0-9a-f]+$":
256 reg = <0xff770000 0x10000>;
267 #phy-cells = <0>;
272 reg = <0xe450 0x10>;
275 #clock-cells = <0>;
279 #phy-cells = <0>;
280 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
285 #phy-cells = <0>;
286 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3368.dtsi76 #address-cells = <0x2>;
77 #size-cells = <0x0>;
114 cpu_sleep: cpu-sleep-0 {
116 arm,psci-suspend-param = <0x1010000>;
117 entry-latency-us = <0x3fffffff>;
118 exit-latency-us = <0x40000000>;
119 min-residency-us = <0xffffffff>;
123 cpu_l0: cpu@0 {
126 reg = <0x0 0x0>;
136 reg = <0x0 0x1>;
[all …]
H A Drk3288.dtsi53 #size-cells = <0>;
60 reg = <0x500>;
85 reg = <0x501>;
91 reg = <0x502>;
97 reg = <0x503>;
111 reg = <0xff250000 0x4000>;
122 reg = <0xff600000 0x4000>;
123 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
134 reg = <0xffb20000 0x4000>;
135 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
[all …]
H A Drk3399.dtsi43 #size-cells = <0>;
71 cpu_l0: cpu@0 {
74 reg = <0x0 0x0>;
83 reg = <0x0 0x1>;
91 reg = <0x0 0x2>;
99 reg = <0x0 0x3>;
107 reg = <0x0 0x100>;
116 reg = <0x0 0x101>;
139 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
140 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi40 #address-cells = <0x2>;
41 #size-cells = <0x0>;
75 cpu_l0: cpu@0 {
78 reg = <0x0 0x0>;
86 reg = <0x0 0x1>;
94 reg = <0x0 0x2>;
102 reg = <0x0 0x3>;
110 reg = <0x0 0x100>;
118 reg = <0x0 0x101>;
126 reg = <0x0 0x102>;
[all …]
H A Drk3399.dtsi41 #size-cells = <0>;
69 cpu_l0: cpu@0 {
72 reg = <0x0 0x0>;
84 reg = <0x0 0x1>;
96 reg = <0x0 0x2>;
108 reg = <0x0 0x3>;
120 reg = <0x0 0x100>;
138 reg = <0x0 0x101>;
159 arm,psci-suspend-param = <0x0010000>;
168 arm,psci-suspend-param = <0x1010000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi53 #size-cells = <0>;
60 reg = <0x500>;
71 reg = <0x501>;
82 reg = <0x502>;
93 reg = <0x503>;
103 cpu_opp_table: opp-table-0 {
163 * The rk3288 cannot use the memory area above 0xfe000000
173 reg = <0x0 0xfe000000 0x0 0x1000000>;
181 #clock-cells = <0>;
197 reg = <0x0 0xff810000 0x0 0x20>;
[all …]