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/openbmc/linux/Documentation/devicetree/bindings/ufs/
H A Dhisilicon,ufs.yaml77 reg = <0x0 0xff3c0000 0x0 0x1000>,
78 <0x0 0xff3e0000 0x0 0x1000>;
84 freq-table-hz = <0 0>,
85 <0 0>;
87 resets = <&crg_rst 0x84 12>;
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3670.dtsi25 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0 0x0>;
68 reg = <0x0 0x1>;
75 reg = <0x0 0x2>;
82 reg = <0x0 0x3>;
89 reg = <0x0 0x100>;
96 reg = <0x0 0x101>;
103 reg = <0x0 0x102>;
110 reg = <0x0 0x103>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0x0 0x0>;
54 reg = <0x0 0x1>;
67 reg = <0x0 0x2>;
80 reg = <0x0 0x3>;
96 arm,psci-suspend-param = <0x0010000>;
110 cpu0_opp_table: opp-table-0 {
208 #clock-cells = <0>;
215 reg = <0x0 0xff000000 0x0 0x1000>;
[all …]
H A Drk3399.dtsi41 #size-cells = <0>;
69 cpu_l0: cpu@0 {
72 reg = <0x0 0x0>;
84 reg = <0x0 0x1>;
96 reg = <0x0 0x2>;
108 reg = <0x0 0x3>;
120 reg = <0x0 0x100>;
138 reg = <0x0 0x101>;
159 arm,psci-suspend-param = <0x0010000>;
168 arm,psci-suspend-param = <0x1010000>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3399.dtsi43 #size-cells = <0>;
71 cpu_l0: cpu@0 {
74 reg = <0x0 0x0>;
83 reg = <0x0 0x1>;
91 reg = <0x0 0x2>;
99 reg = <0x0 0x3>;
107 reg = <0x0 0x100>;
116 reg = <0x0 0x101>;
139 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
140 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
[all …]