Searched +full:0 +full:xff240000 (Results 1 – 5 of 5) sorted by relevance
45 const: 056 - enum: [0, 1]83 reg = <0xff240000 0x1000>,84 <0xff250000 0x1000>;86 dsa,member = <0 0>;90 #size-cells = <0>;92 port@0 {93 reg = <0>;118 #size-cells = <0>;120 led@0 {[all …]
34 #size-cells = <0>;36 cpu0: cpu@0 {39 reg = <0x0 0x0>;47 reg = <0x0 0x1>;53 reg = <0x0 0x2>;59 reg = <0x0 0x3>;125 #clock-cells = <0>;132 reg = <0x0 0xff000000 0x0 0x1000>;144 reg = <0x0 0xff010000 0x0 0x1000>;156 reg = <0x0 0xff020000 0x0 0x1000>;[all …]
39 #size-cells = <0>;41 cpu0: cpu@0 {44 reg = <0x0 0x0>;57 reg = <0x0 0x1>;67 reg = <0x0 0x2>;77 reg = <0x0 0x3>;90 arm,psci-suspend-param = <0x0010000>;104 cpu0_opp_table: opp-table-0 {144 #clock-cells = <0>;162 #clock-cells = <0>;[all …]
36 #size-cells = <0>;38 cpu0: cpu@0 {41 reg = <0x0 0x0>;54 reg = <0x0 0x1>;67 reg = <0x0 0x2>;80 reg = <0x0 0x3>;96 arm,psci-suspend-param = <0x0010000>;110 cpu0_opp_table: opp-table-0 {208 #clock-cells = <0>;215 reg = <0x0 0xff000000 0x0 0x1000>;[all …]
40 #size-cells = <0>;42 cpu0: cpu@0 {45 reg = <0x0 0x0>;57 reg = <0x0 0x1>;69 reg = <0x0 0x2>;81 reg = <0x0 0x3>;96 arm,psci-suspend-param = <0x0010000>;105 arm,psci-suspend-param = <0x1010000>;113 cpu0_opp_table: opp-table-0 {164 #clock-cells = <0>;[all …]