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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dw-hdmi.yaml48 port@0:
61 - port@0
87 reg = <0xfead0000 0x10000>;
88 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
96 #size-cells = <0>;
97 port@0 {
98 reg = <0>;
/openbmc/u-boot/arch/arm/dts/
H A Dr8a77965.dtsi34 * The external audio clocks are configured as 0 Hz fixed frequency
40 #clock-cells = <0>;
41 clock-frequency = <0>;
46 #clock-cells = <0>;
47 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
59 #clock-cells = <0>;
60 clock-frequency = <0>;
65 #size-cells = <0>;
[all …]
H A Dr8a7796.dtsi31 * The external audio clocks are configured as 0 Hz fixed frequency
37 #clock-cells = <0>;
38 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #clock-cells = <0>;
50 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
128 #size-cells = <0>;
[all …]
H A Dr8a7795.dtsi31 * The external audio clocks are configured as 0 Hz fixed frequency
37 #clock-cells = <0>;
38 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #clock-cells = <0>;
50 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
117 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588s.dtsi23 #size-cells = <0>;
58 cpu_l0: cpu@0 {
61 reg = <0x0>;
82 reg = <0x100>;
101 reg = <0x200>;
120 reg = <0x300>;
139 reg = <0x400>;
160 reg = <0x500>;
179 reg = <0x600>;
200 reg = <0x700>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77965.dtsi25 * The external audio clocks are configured as 0 Hz fixed frequency
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
54 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a774a1.dtsi21 * The external audio clocks are configured as 0 Hz fixed frequency
27 #clock-cells = <0>;
28 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
39 #clock-cells = <0>;
40 clock-frequency = <0>;
46 #clock-cells = <0>;
47 clock-frequency = <0>;
50 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a774b1.dtsi21 * The external audio clocks are configured as 0 Hz fixed frequency
27 #clock-cells = <0>;
28 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
39 #clock-cells = <0>;
40 clock-frequency = <0>;
46 #clock-cells = <0>;
47 clock-frequency = <0>;
50 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77961.dtsi20 * The external audio clocks are configured as 0 Hz fixed frequency
26 #clock-cells = <0>;
27 clock-frequency = <0>;
32 #clock-cells = <0>;
33 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
49 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a774e1.dtsi21 * The external audio clocks are configured as 0 Hz fixed frequency
27 #clock-cells = <0>;
28 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
39 #clock-cells = <0>;
40 clock-frequency = <0>;
46 #clock-cells = <0>;
47 clock-frequency = <0>;
50 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77960.dtsi20 * The external audio clocks are configured as 0 Hz fixed frequency
26 #clock-cells = <0>;
27 clock-frequency = <0>;
32 #clock-cells = <0>;
33 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
45 #clock-cells = <0>;
46 clock-frequency = <0>;
49 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77951.dtsi25 * The external audio clocks are configured as 0 Hz fixed frequency
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <0>;
54 cluster0_opp: opp-table-0 {
[all …]