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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dbrcm,bdc.yaml46 reg = <0xf0b02000 0xfc4>;
47 interrupts = <0x0 0x60 0x0>;
48 phys = <&usbphy_0 0x0>;
/openbmc/linux/drivers/dma/
H A Dst_fdma.h63 #define FDMA_NODE_CTRL_REQ_MAP_MASK GENMASK(4, 0)
64 #define FDMA_NODE_CTRL_REQ_MAP_FREE_RUN 0x0
150 #define FDMA_CMD_STA_OFST 0xFC0
151 #define FDMA_CMD_SET_OFST 0xFC4
152 #define FDMA_CMD_CLR_OFST 0xFC8
153 #define FDMA_CMD_MASK_OFST 0xFCC
154 #define FDMA_CMD_START(ch) (0x1 << (ch << 1))
155 #define FDMA_CMD_PAUSE(ch) (0x2 << (ch << 1))
156 #define FDMA_CMD_FLUSH(ch) (0x3 << (ch << 1))
158 #define FDMA_INT_STA_OFST 0xFD0
[all …]
/openbmc/linux/sound/pci/lola/
H A Dlola.h17 #define LOLA_BAR0_GCAP 0x00
18 #define LOLA_BAR0_VMIN 0x02
19 #define LOLA_BAR0_VMAJ 0x03
20 #define LOLA_BAR0_OUTPAY 0x04
21 #define LOLA_BAR0_INPAY 0x06
22 #define LOLA_BAR0_GCTL 0x08
23 #define LOLA_BAR0_WAKEEN 0x0c
24 #define LOLA_BAR0_STATESTS 0x0e
25 #define LOLA_BAR0_GSTS 0x10
26 #define LOLA_BAR0_OUTSTRMPAY 0x18
[all …]
/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-cpu-debug.c29 #define EDPCSR 0x0A0
30 #define EDCIDSR 0x0A4
31 #define EDVIDSR 0x0A8
32 #define EDPCSR_HI 0x0AC
33 #define EDOSLAR 0x300
34 #define EDPRCR 0x310
35 #define EDPRSR 0x314
36 #define EDDEVID1 0xFC4
37 #define EDDEVID 0xFC8
39 #define EDPCSR_PROHIBITED 0xFFFFFFFF
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_d.h27 #define mmMM_INDEX 0x0
28 #define mmMM_INDEX_HI 0x6
29 #define mmMM_DATA 0x1
30 #define mmCC_BIF_BX_FUSESTRAP0 0x14D7
31 #define mmCC_BIF_BX_STRAP2 0x152A
32 #define mmBIF_MM_INDACCESS_CNTL 0x1500
33 #define mmBIF_DOORBELL_APER_EN 0x1501
34 #define mmBUS_CNTL 0x1508
35 #define mmCONFIG_CNTL 0x1509
36 #define mmCONFIG_MEMSIZE 0x150a
[all …]
/openbmc/qemu/hw/pci-host/
H A Dmv643xx.h22 #define MV64340_CS_0_BASE_ADDR 0x008
23 #define MV64340_CS_0_SIZE 0x010
24 #define MV64340_CS_1_BASE_ADDR 0x208
25 #define MV64340_CS_1_SIZE 0x210
26 #define MV64340_CS_2_BASE_ADDR 0x018
27 #define MV64340_CS_2_SIZE 0x020
28 #define MV64340_CS_3_BASE_ADDR 0x218
29 #define MV64340_CS_3_SIZE 0x220
33 #define MV64340_DEV_CS0_BASE_ADDR 0x028
34 #define MV64340_DEV_CS0_SIZE 0x030
[all …]
/openbmc/linux/include/linux/
H A Dmv643xx.h22 #define MV64340_CS_0_BASE_ADDR 0x008
23 #define MV64340_CS_0_SIZE 0x010
24 #define MV64340_CS_1_BASE_ADDR 0x208
25 #define MV64340_CS_1_SIZE 0x210
26 #define MV64340_CS_2_BASE_ADDR 0x018
27 #define MV64340_CS_2_SIZE 0x020
28 #define MV64340_CS_3_BASE_ADDR 0x218
29 #define MV64340_CS_3_SIZE 0x220
33 #define MV64340_DEV_CS0_BASE_ADDR 0x028
34 #define MV64340_DEV_CS0_SIZE 0x030
[all …]
/openbmc/linux/drivers/mfd/
H A Dcs47l90-tables.c18 { 0x8A, 0x5555 },
19 { 0x8A, 0xAAAA },
20 { 0x4CF, 0x0700 },
21 { 0x171, 0x0003 },
22 { 0x101, 0x0444 },
23 { 0x159, 0x0002 },
24 { 0x120, 0x0444 },
25 { 0x1D1, 0x0004 },
26 { 0x1E0, 0xC084 },
27 { 0x159, 0x0000 },
[all …]
H A Dcs47l85-tables.c18 { 0x80, 0x0003 },
19 { 0x213, 0x03E4 },
20 { 0x177, 0x0281 },
21 { 0x197, 0x0281 },
22 { 0x1B7, 0x0281 },
23 { 0x4B1, 0x010A },
24 { 0x4CF, 0x0933 },
25 { 0x36C, 0x011B },
26 { 0x4B8, 0x1120 },
27 { 0x4A0, 0x3280 },
[all …]
/openbmc/linux/include/linux/mfd/arizona/
H A Dregisters.h16 #define ARIZONA_SOFTWARE_RESET 0x00
17 #define ARIZONA_DEVICE_REVISION 0x01
18 #define ARIZONA_CTRL_IF_SPI_CFG_1 0x08
19 #define ARIZONA_CTRL_IF_I2C1_CFG_1 0x09
20 #define ARIZONA_CTRL_IF_I2C2_CFG_1 0x0A
21 #define ARIZONA_CTRL_IF_I2C1_CFG_2 0x0B
22 #define ARIZONA_CTRL_IF_I2C2_CFG_2 0x0C
23 #define ARIZONA_CTRL_IF_STATUS_1 0x0D
24 #define ARIZONA_WRITE_SEQUENCER_CTRL_0 0x16
25 #define ARIZONA_WRITE_SEQUENCER_CTRL_1 0x17
[all …]