Searched +full:0 +full:xf0100000 (Results 1 – 15 of 15) sorted by relevance
/openbmc/linux/arch/arm/mach-shmobile/ |
H A D | setup-sh73a0.c | 29 l2x0_init(ioremap(0xf0100000, PAGE_SIZE), 0x00400000, 0xc20f0fff); in sh73a0_generic_init()
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/openbmc/linux/Documentation/devicetree/bindings/peci/ |
H A D | nuvoton,npcm-peci.yaml | 51 reg = <0xf0100000 0x200>;
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/openbmc/linux/arch/xtensa/boot/dts/ |
H A D | virt.dts | 14 memory@0 { 16 reg = <0x00000000 0x80000000>; 21 #size-cells = <0>; 22 cpu@0 { 24 reg = <0>; 31 #clock-cells = <0>; 40 * two cells: second cell == 0: internal irq number 43 #address-cells = <0>; 53 #interrupt-cells = <0x1>; 55 bus-range = <0x0 0x3e>; [all …]
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/openbmc/linux/arch/arc/boot/dts/ |
H A D | haps_hs.dts | 19 reg = <0x0 0x80000000 0x0 0x40000000 /* 1 GB low mem */ 20 0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */ 24 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-… 38 ranges = <0x80000000 0x0 0x80000000 0x80000000>; 41 #clock-cells = <0>; 54 reg = <0xf0000000 0x2000>; 71 reg = <0xf0100000 0x2000>; 77 reg = <0xf0102000 0x2000>; 83 reg = <0xf0104000 0x2000>; 89 reg = <0xf0106000 0x2000>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3568.dtsi | 13 reg = <0 0xfc000000 0 0x1000>; 20 ports-implemented = <0x1>; 27 reg = <0x0 0xfdc70000 0x0 0x1000>; 32 reg = <0x0 0xfe190080 0x0 0x20>; 37 reg = <0x0 0xfe190100 0x0 0x20>; 42 reg = <0x0 0xfe190200 0x0 0x20>; 47 reg = <0x0 0xfdcb8000 0x0 0x10000>; 52 reg = <0x0 0xfe8c0000 0x0 0x20000>; 53 #phy-cells = <0>; 67 bus-range = <0x0 0xf>; [all …]
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H A D | rk3588.dtsi | 12 reg = <0x0 0xfd5b8000 0x0 0x10000>; 17 reg = <0x0 0xfd5c0000 0x0 0x100>; 22 reg = <0x0 0xfddc8000 0x0 0x1000>; 23 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH 0>; 33 #sound-dai-cells = <0>; 39 reg = <0x0 0xfddf4000 0x0 0x1000>; 40 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>; 50 #sound-dai-cells = <0>; 56 reg = <0x0 0xfddf8000 0x0 0x1000>; 57 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH 0>; [all …]
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/openbmc/u-boot/include/configs/ |
H A D | suvd3.h | 35 #define CONFIG_SYS_QE_FW_ADDR 0xF00B0000 45 #define CONFIG_ENV_ADDR 0xF0100000 46 #define CONFIG_ENV_OFFSET 0x100000 62 #define CONFIG_SYS_APP1_BASE 0xA0000000 64 #define CONFIG_SYS_APP2_BASE 0xB0000000 104 0x0000c000 | \ 137 #define CONFIG_SYS_IBAT5L (0) 138 #define CONFIG_SYS_IBAT5U (0) 156 #define CONFIG_KM_MVEXTSW_ADDR 0x10 160 #define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */ [all …]
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/openbmc/u-boot/arch/arm/mach-orion5x/include/mach/ |
H A D | cpu.h | 22 ((_x ? ORION5X_EGIGA0_BASE : ORION5X_EGIGA1_BASE) + 0x44c) 37 ORION5X_TARGET_DRAM = 0, 45 ORION5X_ATTR_DRAM_CS0 = 0x0e, 46 ORION5X_ATTR_DRAM_CS1 = 0x0d, 47 ORION5X_ATTR_DRAM_CS2 = 0x0b, 48 ORION5X_ATTR_DRAM_CS3 = 0x07, 49 ORION5X_ATTR_PCI_MEM = 0x59, 50 ORION5X_ATTR_PCI_IO = 0x51, 51 ORION5X_ATTR_PCIE_MEM = 0x59, 52 ORION5X_ATTR_PCIE_IO = 0x51, [all …]
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/openbmc/linux/arch/arm64/boot/dts/amazon/ |
H A D | alpine-v2.dtsi | 47 #size-cells = <0>; 49 cpu@0 { 52 reg = <0x0 0x0>; 59 reg = <0x0 0x1>; 66 reg = <0x0 0x2>; 73 reg = <0x0 0x3>; 81 cpu_suspend = <0x84000001>; 82 cpu_off = <0x84000002>; 83 cpu_on = <0x84000003>; 88 #clock-cells = <0>; [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | spear600.dtsi | 12 #address-cells = <0>; 13 #size-cells = <0>; 23 reg = <0 0x40000000>; 30 ranges = <0xd0000000 0xd0000000 0x30000000>; 35 reg = <0xf1100000 0x1000>; 42 reg = <0xf1000000 0x1000>; 48 reg = <0xfc200000 0x1000>; 56 reg = <0xfc400000 0x1000>; 64 reg = <0xe0800000 0x8000>; 76 reg = <0xd1800000 0x1000 /* FSMC Register */ [all …]
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/openbmc/linux/arch/arm/boot/dts/renesas/ |
H A D | r8a7740.dtsi | 20 #size-cells = <0>; 21 cpu@0 { 24 reg = <0x0>; 35 reg = <0xc2800000 0x1000>, 36 <0xc2000000 0x1000>; 41 reg = <0xf0100000 0x1000>; 53 reg = <0xfe400000 0x400>; 68 reg = <0xfe910000 0x3000>; 77 reg = <0xfe914000 0x3000>; 87 reg = <0xe6138000 0x170>; [all …]
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H A D | sh73a0.dtsi | 20 #size-cells = <0>; 22 cpu0: cpu@0 { 25 reg = <0>; 44 reg = <0xf0000200 0x100>; 51 reg = <0xf0000600 0x20>; 60 reg = <0xf0001000 0x1000>, 61 <0xf0000100 0x100>; 66 reg = <0xf0100000 0x1000>; 78 reg = <0xfb400000 0x400>; 87 reg = <0xfe400000 0x400>; [all …]
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/openbmc/linux/arch/arm/boot/dts/nuvoton/ |
H A D | nuvoton-common-npcm7xx.dtsi | 17 #clock-cells = <0>; 25 #clock-cells = <0>; 33 #clock-cells = <0>; 41 #clock-cells = <0>; 49 #clock-cells = <0>; 56 #clock-cells = <0>; 66 ranges = <0x0 0xf0000000 0x00900000>; 70 reg = <0x3fe000 0x1000>; 75 reg = <0x3fc000 0x1000>; 87 reg = <0x3ff000 0x1000>, [all …]
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/openbmc/qemu/hw/arm/ |
H A D | npcm7xx.c | 36 #define NPCM7XX_MMIO_BA (0x80000000) 37 #define NPCM7XX_MMIO_SZ (0x7ffd0000) 40 #define NPCM7XX_OTP1_BA (0xf0189000) 41 #define NPCM7XX_OTP2_BA (0xf018a000) 44 #define NPCM7XX_L2C_BA (0xf03fc000) 45 #define NPCM7XX_CPUP_BA (0xf03fe000) 46 #define NPCM7XX_GCR_BA (0xf0800000) 47 #define NPCM7XX_CLK_BA (0xf0801000) 48 #define NPCM7XX_MC_BA (0xf0824000) 49 #define NPCM7XX_RNG_BA (0xf000b000) [all …]
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/openbmc/linux/arch/arm/ |
H A D | Kconfig.debug | 149 0x80000000 | 0xf0000000 | UART0 150 0x80004000 | 0xf0004000 | UART1 151 0x80008000 | 0xf0008000 | UART2 152 0x8000c000 | 0xf000c000 | UART3 153 0x80010000 | 0xf0010000 | UART4 154 0x80014000 | 0xf0014000 | UART5 155 0x80018000 | 0xf0018000 | UART6 156 0x8001c000 | 0xf001c000 | UART7 157 0x80020000 | 0xf0020000 | UART8 158 0x80024000 | 0xf0024000 | UART9 [all …]
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