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Searched +full:0 +full:xe0800000 (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-spear/
H A Dhardware.h10 #define CONFIG_SYS_USBD_BASE 0xE1100000
11 #define CONFIG_SYS_PLUG_BASE 0xE1200000
12 #define CONFIG_SYS_FIFO_BASE 0xE1000800
13 #define CONFIG_SYS_UHC0_EHCI_BASE 0xE1800000
14 #define CONFIG_SYS_UHC1_EHCI_BASE 0xE2000000
15 #define CONFIG_SYS_SMI_BASE 0xFC000000
16 #define CONFIG_SPEAR_SYSCNTLBASE 0xFCA00000
17 #define CONFIG_SPEAR_TIMERBASE 0xFC800000
18 #define CONFIG_SPEAR_MISCBASE 0xFCA80000
19 #define CONFIG_SPEAR_ETHBASE 0xE0800000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-lantiq-ssc.txt27 reg = <0xE100800 0x100>;
39 reg = <0xe0800000 0x400>;
43 #size-cells = <0>;
/openbmc/u-boot/doc/device-tree-bindings/net/
H A Dstmmac.txt52 reg = <0xe0800000 0x8000>;
/openbmc/linux/arch/arm/boot/dts/st/
H A Dspear3xx.dtsi14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0 0x40000000>;
32 ranges = <0xd0000000 0xd0000000 0x30000000>;
37 reg = <0xf1100000 0x1000>;
43 reg = <0xfc400000 0x1000>;
51 reg = <0xe0800000 0x8000>;
62 reg = <0xfc000000 0x1000>;
69 reg = <0xd0100000 0x1000>;
72 #size-cells = <0>;
[all …]
H A Dspear600.dtsi12 #address-cells = <0>;
13 #size-cells = <0>;
23 reg = <0 0x40000000>;
30 ranges = <0xd0000000 0xd0000000 0x30000000>;
35 reg = <0xf1100000 0x1000>;
42 reg = <0xf1000000 0x1000>;
48 reg = <0xfc200000 0x1000>;
56 reg = <0xfc400000 0x1000>;
64 reg = <0xe0800000 0x8000>;
76 reg = <0xd1800000 0x1000 /* FSMC Register */
[all …]
/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-xgbe-b.dtsi10 #clock-cells = <0>;
17 #clock-cells = <0>;
24 #clock-cells = <0>;
31 #clock-cells = <0>;
38 reg = <0 0xe0700000 0 0x80000>,
39 <0 0xe0780000 0 0x80000>,
40 <0 0xe1240800 0 0x00400>, /* SERDES RX/TX0 */
41 <0 0xe1250000 0 0x00060>, /* SERDES IR 1/2 */
42 <0 0xe12500f8 0 0x00004>; /* SERDES IR 2/2 */
43 interrupts = <0 325 4>,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwmac.yaml211 "^queue[0-9]$":
362 "^queue[0-9]$":
376 Queue 0 is reserved for legacy traffic and so no AVB is
674 reg = <0xe0800000 0x8000>;
692 snps,wr_osr_lmt = <0xf>;
693 snps,rd_osr_lmt = <0xf>;
694 snps,blen = <256 128 64 32 0 0 0>;
702 snps,map-to-dma-channel = <0x0>;
703 snps,priority = <0x0>;
711 snps,weight = <0x10>;
[all …]
/openbmc/qemu/hw/arm/
H A Dnpcm7xx.c36 #define NPCM7XX_MMIO_BA (0x80000000)
37 #define NPCM7XX_MMIO_SZ (0x7ffd0000)
40 #define NPCM7XX_OTP1_BA (0xf0189000)
41 #define NPCM7XX_OTP2_BA (0xf018a000)
44 #define NPCM7XX_L2C_BA (0xf03fc000)
45 #define NPCM7XX_CPUP_BA (0xf03fe000)
46 #define NPCM7XX_GCR_BA (0xf0800000)
47 #define NPCM7XX_CLK_BA (0xf0801000)
48 #define NPCM7XX_MC_BA (0xf0824000)
49 #define NPCM7XX_RNG_BA (0xf000b000)
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama7g5.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
88 hysteresis = <0>;
94 hysteresis = <0>;
100 hysteresis = <0>;
122 #clock-cells = <0>;
127 #clock-cells = <0>;
132 #clock-cells = <0>;
151 reg = <0x100000 0x20000>;
[all …]