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Searched +full:0 +full:xe0004000 (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/doc/device-tree-bindings/i2c/
H A Di2c-cdns.txt15 reg = <0xe0004000 0x1000>;
17 interrupts = <0 25 4>;
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dcdns,i2c-r1p10.yaml70 reg = <0xe0004000 0x1000>;
73 #size-cells = <0>;
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs4234.yaml34 binary given by [0 0 1 0 AD2 AD1 AD0 0].
36 minimum: 0x10
37 maximum: 0x17
62 #size-cells = <0>;
63 reg = <0xe0004000 0x1000>;
67 reg = <0x11>;
72 reset-gpios = <&gpio 0>;
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dcirrus,madera.yaml236 #size-cells = <0>;
237 reg = <0xe0004000 0x1000>;
241 reg = <0x1a>;
243 reset-gpios = <&gpio 0>;
248 interrupts = <4 1 0>;
263 clocks = <&clks 0>, <&clks 1>, <&clks 2>;
266 cirrus,dmic-ref = <0 0 MADERA_DMIC_REF_MICBIAS1>;
272 cirrus,max-channels-clocked = <2 0 0>;
275 pinctrl-0 = <&pinsettings>;
H A Dwlf,arizona.yaml222 #size-cells = <0>;
223 reg = <0xe0004000 0x1000>;
227 reg = <0x1a>;
229 reset-gpios = <&gpio 0>;
259 clocks = <&clks 0>, <&clks 1>;
270 wlf,micd-detect-debounce = <0>;
271 wlf,micd-pol-gpio = <&codec 2 0>;
276 wlf,micd-configs = <0 ARIZONA_DMIC_MICBIAS1 0>,
277 <0x2000 ARIZONA_DMIC_MICBIAS2 1>;
H A Dcirrus,lochnagar.yaml57 const: 0x22
273 #size-cells = <0>;
274 reg = <0xe0004000 0x1000>;
278 reg = <0x22>;
280 reset-gpios = <&gpio0 55 0>;
281 present-gpios = <&gpio0 60 0>;
297 #clock-cells = <0>;
306 gpio-ranges = <&lochnagar 0 0 LOCHNAGAR2_PIN_NUM_GPIOS>;
309 pinctrl-0 = <&pinsettings>;
/openbmc/linux/arch/mips/include/asm/
H A Djazz.h15 * but many hardware register are accessible at 0xb9000000 in
16 * instead of 0xe0000000.
19 #define JAZZ_LOCAL_IO_SPACE 0xe0000000
24 * 0xf0000000 - Rev1
25 * 0xf0000001 - Rev2
26 * 0xf0000002 - Rev3
28 #define PICA_ASIC_REVISION 0xe0000008
43 * --------- . (0)
45 #define PICA_LED 0xe000f000
54 #define LED_DOT 0x01
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dzynq-7000.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
50 interrupts = <0 5 4>, <0 6 4>;
52 reg = <0xf8891000 0x1000>,
53 <0xf8893000 0x1000>;
75 reg = <0xf8007100 0x20>;
76 interrupts = <0 7 4>;
86 reg = <0xe0008000 0x1000>;
87 interrupts = <0 28 4>;
[all …]
/openbmc/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
18 reg = <0>;
47 interrupts = <0 5 4>, <0 6 4>;
49 reg = <0xf8891000 0x1000>,
50 <0xf8893000 0x1000>;
69 #size-cells = <0>;
72 port@0 {
73 reg = <0>;
104 reg = <0xf8007100 0x20>;
[all …]
/openbmc/qemu/hw/arm/
H A Dxilinx_zynq.c59 #define MPCORE_PERIPHBASE 0xF8F00000
60 #define ZYNQ_BOARD_MIDR 0x413FC090
66 #define BOARD_SETUP_ADDR 0x100
68 #define SLCR_LOCK_OFFSET 0x004
69 #define SLCR_UNLOCK_OFFSET 0x008
70 #define SLCR_ARM_PLL_OFFSET 0x100
72 #define SLCR_XILINX_UNLOCK_KEY 0xdf0d
73 #define SLCR_XILINX_LOCK_KEY 0x767b
75 #define ZYNQ_SDHCI_CAPABILITIES 0x69ec0080 /* Datasheet: UG585 (v1.12.1) */
77 #define ARMV7_IMM16(x) (extract32((x), 0, 12) | \
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama7g5.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
88 hysteresis = <0>;
94 hysteresis = <0>;
100 hysteresis = <0>;
122 #clock-cells = <0>;
127 #clock-cells = <0>;
132 #clock-cells = <0>;
151 reg = <0x100000 0x20000>;
[all …]
/openbmc/linux/arch/parisc/kernel/
H A Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]