Searched +full:0 +full:xc8010000 (Results 1 – 4 of 4) sorted by relevance
50 reg = <0xc8010000 0x1000>;
14 /* Uses at least up to 0x124 */15 reg = <0xc4000000 0x1000>;20 reg = <0x70002100 4>;33 reg = <0xc800b000 0x1000>;40 reg = <0xc8011000 0x18>;48 reg = <0xc800d000 0x1000>;52 queue-rx = <&qmgr 0>;53 queue-txready = <&qmgr 0>;59 reg = <0xc800e000 0x1000>;63 queue-rx = <&qmgr 0>;[all …]
19 ((_x ? KW_EGIGA1_BASE : KW_EGIGA0_BASE) + 0x44c)21 #define KW_REG_PCIE_DEVID (KW_REG_PCIE_BASE + 0x00)22 #define KW_REG_PCIE_REVID (KW_REG_PCIE_BASE + 0x08)23 #define KW_REG_DEVICE_ID (KW_MPP_BASE + 0x34)24 #define KW_REG_SYSRST_CNT (KW_MPP_BASE + 0x50)26 #define KW_REG_MPP_OUT_DRV_REG (KW_MPP_BASE + 0xE0)49 KWCPU_ATTR_SASRAM = 0x01,50 KWCPU_ATTR_DRAM_CS0 = 0x0e,51 KWCPU_ATTR_DRAM_CS1 = 0x0d,52 KWCPU_ATTR_DRAM_CS2 = 0x0b,[all …]
13 #size-cells = <0>;15 cpu@0 {18 reg = <0>;22 bootrom: bootrom@0 {23 reg = <0x00000000 0x80000>;28 reg = <0xa4000000 0x20000>; /* 128k */31 ranges = <0 0xa4000000 0x20000>;33 sram@0 {34 reg = <0x0 0x20000>;39 #clock-cells = <0>;[all …]