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/openbmc/u-boot/arch/nds32/include/asm/arch-ag102/
H A Dag102.h15 #define CONFIG_FTPCI100_BASE 0x90000000
17 #define CONFIG_LPC_IO_BASE 0x90100000
19 #define CONFIG_LPC_BASE 0x90200000
22 #define CONFIG_NDS_DLM1_BASE 0x90300000
24 #define CONFIG_NDS_DLM2_BASE 0x90400000
27 #define CONFIG_DWCDDR21MCTL_BASE 0x90500000
29 #define CONFIG_FTDMAC020_BASE 0x90600000
31 #define CONFIG_FTIDE020S_BASE 0x90700000
33 #define CONFIG_FZOTG266HD0A_BASE 0x90800000
35 #define CONFIG_NCEL2C100_BASE 0x90900000
[all …]
/openbmc/u-boot/arch/nds32/include/asm/arch-ag101/
H A Dag101.h14 #define CONFIG_FTAHBC020S_BASE 0x90100000
16 #define CONFIG_FTSMC020_BASE 0x90200000
18 #define CONFIG_FTSDMC021_BASE 0x90300000
20 #define CONFIG_FTDMAC020_BASE 0x90400000
22 #define CONFIG_FTAPBBRG020S_01_BASE 0x90500000
24 #define CONFIG_FTLCDC100_BASE 0x90600000
26 #define CONFIG_RESERVED_01_BASE 0x90700000
28 #define CONFIG_RESERVED_02_BASE 0x90800000
30 #define CONFIG_FTMAC100_BASE 0x90900000
32 #define CONFIG_EXT_USB_HOST_BASE 0x90A00000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dgpu.yaml20 … - pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$'
26 - pattern: '^qcom,adreno-[3-6][0-9][0-9]\.[0-9]$'
32 - pattern: '^amd,imageon-200\.[0-1]$'
130 pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]$'
206 pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$'
233 reg = <0xfdb00000 0x10000>;
247 iommus = <&gpu_iommu 0>;
254 reg = <0xfdd00000 0x2000>,
255 <0xfec00000 0x180000>;
264 ranges = <0 0xfec00000 0x100000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi25 #clock-cells = <0>;
30 #clock-cells = <0>;
36 #size-cells = <0>;
38 CPU0: cpu@0 {
41 reg = <0x0 0x0>;
43 qcom,freq-domain = <&cpufreq_hw 0>;
61 reg = <0x0 0x100>;
63 qcom,freq-domain = <&cpufreq_hw 0>;
76 reg = <0x0 0x200>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]