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/openbmc/u-boot/arch/arm/include/asm/arch-tegra30/
H A Dtegra.h9 #define NV_PA_MC_BASE 0x7000F000
10 #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */
14 #define TEGRA_USB1_BASE 0x7D000000
/openbmc/u-boot/arch/arm/include/asm/arch-tegra124/
H A Dtegra.h10 #define NV_PA_SDRAM_BASE 0x80000000
11 #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
12 #define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */
13 #define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */
21 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
22 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
25 #define MCB_EMEM_ARB_OVERRIDE (NV_PA_MC_BASE + 0xE8)
27 #define TEGRA_USB1_BASE 0x7D000000
/openbmc/u-boot/arch/arm/include/asm/arch-tegra210/
H A Dtegra.h10 #define GICD_BASE 0x50041000 /* Generic Int Cntrlr Distrib */
11 #define GICC_BASE 0x50042000 /* Generic Int Cntrlr CPU I/F */
12 #define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */
13 #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
14 #define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */
15 #define NV_PA_SDRAM_BASE 0x80000000
23 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
24 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
27 #define MCB_EMEM_ARB_OVERRIDE (NV_PA_MC_BASE + 0xE8)
29 #define TEGRA_USB1_BASE 0x7D000000
/openbmc/u-boot/arch/arm/dts/
H A Dtegra30.dtsi16 reg = <0x00003000 0x00000800 /* PADS registers */
17 0x00003800 0x00000200 /* AFI registers */
18 0x10000000 0x10000000>; /* configuration space */
25 interrupt-map-mask = <0 0 0 0>;
26 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
28 bus-range = <0x00 0xff>;
32 ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
33 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
34 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
35 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
[all …]
H A Dtegra114.dtsi15 reg = <0x50000000 0x00028000>;
25 ranges = <0x54000000 0x54000000 0x01000000>;
29 reg = <0x54140000 0x00040000>;
38 reg = <0x54180000 0x00040000>;
46 reg = <0x54200000 0x00040000>;
56 nvidia,head = <0>;
65 reg = <0x54240000 0x00040000>;
84 reg = <0x54280000 0x00040000>;
96 reg = <0x54300000 0x00040000>;
103 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
[all …]
H A Dtegra124.dtsi20 reg = <0x01003000 0x00000800 /* PADS registers */
21 0x01003800 0x00000800 /* AFI registers */
22 0x02000000 0x10000000>; /* configuration space */
29 interrupt-map-mask = <0 0 0 0>;
30 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
32 bus-range = <0x00 0xff>;
36 ranges = <0x82000000 0 0x01000000 0x01000000 0 0x00001000 /* port 0 configuration space */
37 0x82000000 0 0x01001000 0x01001000 0 0x00001000 /* port 1 configuration space */
38 0x81000000 0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
39 0x82000000 0 0x13000000 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
[all …]
H A Dtegra210.dtsi17 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
18 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
19 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
26 interrupt-map-mask = <0 0 0 0>;
27 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
29 bus-range = <0x00 0xff>;
33 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
34 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
35 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
36 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
[all …]
/openbmc/u-boot/include/
H A Dmpc106.h14 #define PCIDEVID_MPC106 0x0
19 #define MPC106_REG 0x80000000
22 #define MPC106_REG_ADDR 0x80000cf8
23 #define MPC106_REG_DATA 0x80000cfc
24 #define MPC106_ISA_IO_PHYS 0x80000000
25 #define MPC106_ISA_IO_BUS 0x00000000
26 #define MPC106_ISA_IO_SIZE 0x00800000
27 #define MPC106_PCI_IO_PHYS 0x81000000
28 #define MPC106_PCI_IO_BUS 0x01000000
29 #define MPC106_PCI_IO_SIZE 0x3e800000
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra114.dtsi17 reg = <0x80000000 0x0>;
22 reg = <0x40000000 0x40000>;
25 ranges = <0 0x40000000 0x40000>;
28 reg = <0x400 0x3fc00>;
35 reg = <0x50000000 0x00028000>;
48 ranges = <0x54000000 0x54000000 0x01000000>;
52 reg = <0x54140000 0x00040000>;
63 reg = <0x54180000 0x00040000>;
73 reg = <0x54200000 0x00040000>;
83 nvidia,head = <0>;
[all …]
H A Dtegra124.dtsi21 reg = <0x0 0x80000000 0x0 0x0>;
27 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
28 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
29 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
36 interrupt-map-mask = <0 0 0 0>;
37 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
39 bus-range = <0x00 0xff>;
43 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
44 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
45 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
[all …]
H A Dtegra30.dtsi20 reg = <0x80000000 0x0>;
26 reg = <0x00003000 0x00000800>, /* PADS registers */
27 <0x00003800 0x00000200>, /* AFI registers */
28 <0x10000000 0x10000000>; /* configuration space */
35 interrupt-map-mask = <0 0 0 0>;
36 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
38 bus-range = <0x00 0xff>;
42 ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
43 <0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
44 <0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi22 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
23 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
24 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
31 interrupt-map-mask = <0 0 0 0>;
32 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
34 bus-range = <0x00 0xff>;
38 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
39 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
40 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
41 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
[all …]
H A Dtegra210.dtsi21 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */
22 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */
23 <0x0 0x02000000 0x0 0x10000000>; /* configuration space */
30 interrupt-map-mask = <0 0 0 0>;
31 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
33 bus-range = <0x00 0xff>;
37 ranges = <0x02000000 0 0x01000000 0x0 0x01000000 0 0x00001000>, /* port 0 configuration space */
38 <0x02000000 0 0x01001000 0x0 0x01001000 0 0x00001000>, /* port 1 configuration space */
39 <0x01000000 0 0x0 0x0 0x12000000 0 0x00010000>, /* downstream I/O (64 KiB) */
40 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Damigaone.dts20 #size-cells = <0>;
22 cpu@0 {
24 reg = <0>;
29 timebase-frequency = <0>; // 33.3 MHz, from U-boot
30 clock-frequency = <0>; // From U-boot
31 bus-frequency = <0>; // From U-boot
37 reg = <0 0>; // From U-boot
44 bus-range = <0 0xff>;
45 ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O
46 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory
[all …]
/openbmc/qemu/hw/ppc/
H A Damigaone.c39 #define PROM_ADDR 0xfff00000
44 0x38, 0x00, 0x00, 0x08, /* li r0,8 */
45 0x7c, 0x09, 0x03, 0xa6, /* mtctr r0 */
46 0x54, 0x63, 0xf8, 0x7e, /* srwi r3,r3,1 */
47 0x42, 0x00, 0xff, 0xfc, /* bdnz 0x8 */
48 0x7c, 0x63, 0x18, 0xf8, /* not r3,r3 */
49 0x4e, 0x80, 0x00, 0x20, /* blr */
95 memory_region_add_subregion(get_system_memory(), 0, machine->ram); in amigaone_init()
100 memory_region_add_subregion(get_system_memory(), 0x40000000, mr); in amigaone_init()
109 PROM_ADDR + PROM_SIZE - 0x80); in amigaone_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra20-usb-phy.yaml101 const: 0
136 minimum: 0
144 minimum: 0
150 minimum: 0
157 minimum: 0
163 minimum: 0
173 minimum: 0
179 minimum: 0
185 minimum: 0
191 minimum: 0
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dboard2.c68 writel(0, &pmc->pmc_pwr_det_latch); in power_det_init()
69 writel(0, &pmc->pmc_pwr_det); in power_det_init()
88 return 0; in checkboard()
94 return 0; in tegra_lcd_pmic_init()
99 return 0; in nvidia_board_init()
130 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); in board_init()
190 struct usb_ctlr *usbctlr = (struct usb_ctlr *)0x7d000000; in board_early_init_f()
208 return 0; in board_early_init_f()
217 * Only bank 0 is below board_get_usable_ram_top(), so all of in board_late_init()
237 return 0; in board_late_init()
[all …]
/openbmc/linux/drivers/video/fbdev/via/
H A Daccel.c19 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc; in viafb_set_bpp()
35 return 0; in viafb_set_bpp()
44 u32 ge_cmd = 0, tmp, i; in hw_bitblt_1()
54 ge_cmd |= 0x00008000; in hw_bitblt_1()
59 ge_cmd |= 0x00004000; in hw_bitblt_1()
67 case 0x00: /* blackness */ in hw_bitblt_1()
68 case 0x5A: /* pattern inversion */ in hw_bitblt_1()
69 case 0xF0: /* pattern copy */ in hw_bitblt_1()
70 case 0xFF: /* whiteness */ in hw_bitblt_1()
84 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000) in hw_bitblt_1()
[all …]
/openbmc/u-boot/drivers/net/
H A Dmt7628-eth.c29 #define MT7628_RSTCTRL_REG 0x34
32 #define MT7628_AGPIO_CFG_REG 0x3c
36 #define MT7628_GPIO2_MODE_REG 0x64
39 #define PDMA_RELATED 0x0800
41 #define TX_BASE_PTR0 (PDMA_RELATED + 0x000)
42 #define TX_MAX_CNT0 (PDMA_RELATED + 0x004)
43 #define TX_CTX_IDX0 (PDMA_RELATED + 0x008)
44 #define TX_DTX_IDX0 (PDMA_RELATED + 0x00c)
46 #define RX_BASE_PTR0 (PDMA_RELATED + 0x100)
47 #define RX_MAX_CNT0 (PDMA_RELATED + 0x104)
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/openbmc/linux/drivers/net/ethernet/netronome/nfp/flower/
H A Dcmsg.h17 #define NFP_FLOWER_LAYER_EXT_META BIT(0)
26 #define NFP_FLOWER_LAYER2_GRE BIT(0)
34 #define NFP_FLOWER_MASK_VLAN_VID GENMASK(11, 0)
39 #define NFP_FLOWER_MASK_MPLS_Q BIT(0)
52 #define NFP_FL_TCP_FLAG_FIN BIT(0)
54 #define NFP_FL_SC_ACT_DROP 0x80000000
55 #define NFP_FL_SC_ACT_USER 0x7D000000
56 #define NFP_FL_SC_ACT_POPV 0x6A000000
57 #define NFP_FL_SC_ACT_NULL 0x00000000
71 #define NFP_FL_ACTION_OPCODE_OUTPUT 0
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]