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Searched +full:0 +full:x70004000 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/sparc/include/asm/
H A Dfbio.h10 #define CG6_FBC 0x70000000
11 #define CG6_TEC 0x70001000
12 #define CG6_BTREGS 0x70002000
13 #define CG6_FHC 0x70004000
14 #define CG6_THC 0x70005000
15 #define CG6_ROM 0x70006000
16 #define CG6_RAM 0x70016000
17 #define CG6_DHC 0x80000000
19 #define CG3_MMAP_OFFSET 0x4000000
22 #define TCX_RAM8BIT 0x00000000
[all …]
/openbmc/linux/arch/m68k/include/asm/
H A Dfbio.h13 #define FBTYPE_SUN1BW 0 /* mono */
58 #define FBIOGTYPE _IOR('F', 0, struct fbtype)
61 int index; /* first element (0 origin) */
124 #define FB_WID_SHARED_8 0
196 #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
225 #define CG6_FBC 0x70000000
226 #define CG6_TEC 0x70001000
227 #define CG6_BTREGS 0x70002000
228 #define CG6_FHC 0x70004000
229 #define CG6_THC 0x70005000
[all …]
/openbmc/u-boot/include/configs/
H A Dm53menlo.h23 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
28 #define CONFIG_SYS_MEMTEST_START 0x70000000
29 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
58 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
90 #define CONFIG_FEC_MXC_PHYADDR 0x0
113 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
124 #define CONFIG_MXC_USB_FLAGS 0
132 #define CONFIG_DWC_AHSATA_PORT_ID 0
171 #define CONFIG_LOADADDR 0x70800000
179 #define CONFIG_SPL_TEXT_BASE 0x70008000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dfsl-imx-esdhc.yaml113 default: 0
132 default: 0
142 default: 0
152 default: 0
192 reg = <0x70004000 0x4000>;
199 reg = <0x70008000 0x4000>;
201 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
202 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dgen9_renderstate.c11 0x000007a8,
12 0x000007b4,
13 0x000007bc,
14 0x000007cc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
H A Dgen8_renderstate.c11 0x00000798,
12 0x000007a4,
13 0x000007ac,
14 0x000007bc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
78 cpu: cpu@0 {
81 reg = <0>;
[all …]