| /openbmc/qemu/ebpf/ |
| H A D | rss.bpf.skeleton.h | 146 s->maps[0].name = "tap_rss_map_configurations"; in rss_bpf__create_skeleton()
147 s->maps[0].map = &obj->maps.tap_rss_map_configurations; in rss_bpf__create_skeleton()
164 s->progs[0].name = "tun_rss_steering_prog"; in rss_bpf__create_skeleton()
165 s->progs[0].prog = &obj->progs.tun_rss_steering_prog; in rss_bpf__create_skeleton()
166 s->progs[0].link = &obj->links.tun_rss_steering_prog; in rss_bpf__create_skeleton()
171 return 0; in rss_bpf__create_skeleton()
180 \x7f\x45\x4c\x46\x02\x01\x01\0\0\0\0\0\0\0\0\0\x01\0\xf7\0\x01\0\0\0\0\0\0\0\0\ in rss_bpf__elf_bytes()
181 \0\0\0\0\0\0\0\0\0\0\0\xb0\x4b\0\0\0\0\0\0\0\0\0\0\x40\0\0\0\0\0\x40\0\x0d\0\ in rss_bpf__elf_bytes()
182 \x01\0\x7b\x1a\x48\xff\0\0\0\0\xb7\x09\0\0\0\0\0\0\x63\x9a\x54\xff\0\0\0\0\xbf\ in rss_bpf__elf_bytes()
183 \xa7\0\0\0\0\0\0\x07\x07\0\0\x54\xff\xff\xff\x18\x01\0\0\0\0\0\0\0\0\0\0\0\0\0\ in rss_bpf__elf_bytes()
[all …]
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| /openbmc/phosphor-logging/test/openpower-pels/ |
| H A D | real_pel_test.cpp | 33 0x50, 0x48, 0x0, 0x30, 0x1, 0x0, 0xA8, 0x0, 0x20, 0x19, 0x6, 0x14,
34 0x12, 0x0, 0x41, 0x51, 0x20, 0x19, 0x6, 0x14, 0x12, 0x0, 0x41, 0x56,
35 0x45, 0x0, 0x1, 0x14, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
36 0x0, 0x0, 0x0, 0x0, 0x50, 0x1, 0xF, 0xA5, 0x50, 0x1, 0xF, 0xA5,
37 0x55, 0x48, 0x0, 0x18, 0x1, 0x0, 0xF1, 0x0, 0x81, 0x3, 0x0, 0x1,
38 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x60, 0x0, 0x0, 0x1, 0x44, 0x0,
39 0x50, 0x53, 0x0, 0x74, 0x1, 0x1, 0xA8, 0x0, 0x2, 0x1, 0x0, 0x9,
40 0x0, 0x0, 0x0, 0x6C, 0x3, 0x1, 0x0, 0xF0, 0x2C, 0xC6, 0x1B, 0x10,
41 0xC1, 0x39, 0x20, 0x0, 0x40, 0x0, 0x0, 0xFF, 0x10, 0x69, 0x14, 0xD8,
42 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0,
[all …]
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| /openbmc/phosphor-host-ipmid/docs/ |
| H A D | ipmi-network-format.md | 13 Specify 'chassis bootdev', field 96, data1 0x00 0x08 0x61 0x80
16 (always 0x21 0x70 0x62 0x21) - 2 byte version value (always 0x00 0x01) - 1 byte
17 hardware address size (eg. 0x06 for MAC address) - 1 byte IP address size (eg.
18 0x04 for IPv4) - Hardware (MAC) address - 1 byte flags for 'ignore' and
19 'method', where method = 0 is DHCP and method = 1 is Static. And for static
24 Specify 'chassis bootdev', field 96, data1 0x00 0x08 0x61 0x80
26 Set a special cookie that Petitboot will recognise: 0x21 0x70 0x62 0x21
28 Specify the version (only 1 at the moment) 0x00 0x01
32 Infiniband/etc. 0x06 0x04 (6-byte MAC address, IPv4 IP address)
34 Set the hardware address of the interface you want to override, eg: 0xf4 0x52
[all …]
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| /openbmc/u-boot/test/ |
| H A D | compression.c | 41 "\x4f\x51\x82\x4f\x88\xc3\x0d\x05\x62\x4f\x91\xa3\x52\x1b\xd0\x52"
47 "\xb1\x2e\x62\x7b\xab\x67\xe7\x99\x2a\x14\x5e\x9f\x64\xcb\x96\xf4"
80 "\x65\x73\x73\x61\x62\x6c\x65\x20\x62\x69\x74\x20\x6f\x66\x20\x74"
83 "\x65\x2c\x20\x62\x75\x74\x20\x74\x68\x69\x73\x20\x6f\x6e\x65\x20"
86 "\x08\x00\x08\x77\x6f\x75\x6c\x64\x6e\x27\x74\x20\x62\x65\x20\x6d"
92 "\x73\x20\x74\x6f\x20\x62\x65\x68\x61\x76\x65\x20\x70\x6f\x6f\x72"
102 "\x65\x73\x73\x61\x62\x6c\x65\x20\x62\x69\x74\x20\x6f\x66\x20\x74"
105 "\x2c\x20\x62\x75\x74\x20\x74\x68\x69\x73\x20\x6f\x6e\x65\x20\x69"
108 "\xf4\x0b\x77\x6f\x75\x6c\x64\x6e\x27\x74\x20\x62\x65\x20\x6d\x75"
114 "\x73\x20\x74\x6f\x20\x62\x65\x68\x61\x76\x65\x20\x70\x6f\x6f\x72"
[all …]
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| /openbmc/u-boot/lib/efi_selftest/ |
| H A D | efi_selftest_disk_image.h | 8 #define EFI_ST_DISK_IMG { 0x00010000, { \
9 {0x000001b8, "\x21\x5d\x53\xd1\x00\x00\x00\x00"}, /* !]S..... */ \
10 {0x000001c0, "\x02\x00\x01\x02\x02\x00\x01\x00"}, /* ........ */ \
11 {0x000001c8, "\x00\x00\x7f\x00\x00\x00\x00\x00"}, /* ........ */ \
12 {0x000001f8, "\x00\x00\x00\x00\x00\x00\x55\xaa"}, /* ......U. */ \
13 {0x00000200, "\xeb\x3c\x90\x6d\x6b\x66\x73\x2e"}, /* .<.mkfs. */ \
14 {0x00000208, "\x66\x61\x74\x00\x02\x04\x01\x00"}, /* fat..... */ \
15 {0x00000210, "\x02\x00\x02\x7f\x00\xf8\x01\x00"}, /* ........ */ \
16 {0x00000218, "\x20\x00\x40\x00\x00\x00\x00\x00"}, /* .@..... */ \
17 {0x00000220, "\x00\x00\x00\x00\x80\x00\x29\xc4"}, /* ......). */ \
[all …]
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| /openbmc/openbmc/meta-facebook/meta-harma/recipes-phosphor/configuration/entity-manager/ |
| H A D | blacklist.json | 3 0, number
7 "0x08", string
8 "0x09",
9 "0x0A",
10 "0x0B",
11 "0x0C",
12 "0x0D",
13 "0x0E",
14 "0x0F",
15 "0x10",
[all …]
|
| /openbmc/u-boot/include/ |
| H A D | st_logo_data.h | 14 0x42, 0x4d, 0x5c, 0x98, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7a, 0x04,
15 0x00, 0x00, 0x6c, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x60, 0x01,
16 0x00, 0x00, 0x01, 0x00, 0x08, 0x00, 0x01, 0x00, 0x00, 0x00, 0xe2, 0x93,
17 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x01,
18 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x42, 0x47, 0x52, 0x73, 0x00, 0x00,
19 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
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| /openbmc/u-boot/board/samtec/vining_fpga/ |
| H A D | socfpga.c | 21 const unsigned int phy_nrst_gpio = 0; in board_late_init()
29 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_late_init()
45 return 0; in board_late_init()
56 /* EEPROM is at bus 0. */ in misc_init_r()
57 ret = i2c_set_bus_num(0); in misc_init_r()
60 return 0; in misc_init_r()
63 /* EEPROM is at address 0x50. */ in misc_init_r()
64 ret = eeprom_read(0x50, 0, data, sizeof(data)); in misc_init_r()
67 return 0; in misc_init_r()
71 if (!(data[0] == 0xa5 && data[1] == 0x5a)) { in misc_init_r()
[all …]
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| /openbmc/qemu/tests/tcg/hexagon/ |
| H A D | hvx_histogram_input.h | 18 { 0x26, 0x32, 0x2e, 0x2e, 0x2d, 0x2c, 0x2d, 0x2d,
19 0x2c, 0x2e, 0x31, 0x33, 0x36, 0x39, 0x3b, 0x3f,
20 0x42, 0x46, 0x4a, 0x4c, 0x51, 0x53, 0x53, 0x54,
21 0x56, 0x57, 0x58, 0x57, 0x56, 0x52, 0x51, 0x4f,
22 0x4c, 0x49, 0x47, 0x42, 0x3e, 0x3b, 0x38, 0x35,
23 0x33, 0x30, 0x2e, 0x2c, 0x2b, 0x2a, 0x2a, 0x28,
24 0x28, 0x27, 0x27, 0x28, 0x29, 0x2a, 0x2c, 0x2e,
25 0x2f, 0x33, 0x36, 0x38, 0x3c, 0x3d, 0x40, 0x42,
26 0x43, 0x42, 0x43, 0x44, 0x43, 0x41, 0x40, 0x3b,
27 0x3b, 0x3a, 0x38, 0x35, 0x32, 0x2f, 0x2c, 0x29,
[all …]
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| /openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/gpio/phosphor-gpio-monitor/ |
| H A D | medusa-power-module-fault | 10 while [ "$decimal" -gt 0 ]; do
18 hex="0$hex"
21 echo "0x${hex:-0}"
28 if mfr_id=$(i2ctransfer -f -y "$bus" w1@"$addr" 0x99 r5); then
29 local vendor="0x46 0x6c 0x65 0x78"
35 return 0
57 # Read STATUS_BYTE (0x78) and STATUS_OTHER (0x7F) if flex type
59 STATUS_BYTE=$(i2ctransfer -f -y "$bus" w1@"$addr" 0x78 r1)
60 local description="(0x78) STATUS_BYTE"
66 STATUS_OTHER=$(i2ctransfer -f -y "$bus" w1@"$addr" 0x7F r1)
[all …]
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| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | ibmpc.h | 12 #define MASTER_PIC 0x20
13 #define PIT_BASE 0x40
14 #define KBDDATA 0x60
15 #define SYSCTLB 0x62
16 #define KBDCMD 0x64
17 #define SYSCTLA 0x92
18 #define SLAVE_PIC 0xa0
20 #define UART0_BASE 0x3f8
21 #define UART1_BASE 0x2f8
|
| /openbmc/u-boot/tools/binman/test/ |
| H A D | 095_fmap_x86_section.dts | 10 size = <0x100>;
14 pad-byte = <0x62>;
18 offset = <0x20>;
|
| H A D | 088_expand_size.dts | 10 size = <0>;
17 pad-byte = <0x62>;
30 size = <0>;
40 size = <0>;
|
| /openbmc/pldm/fw-update/test/ |
| H A D | device_updater_test.cpp | 23 {0x00}, in DeviceUpdaterTest()
26 std::vector<uint8_t>{0x16, 0x20, 0x23, 0xC9, 0x3E, 0xC5, 0x41, in DeviceUpdaterTest()
27 0x15, 0x95, 0xF4, 0x48, 0x70, 0x1D, 0x49, in DeviceUpdaterTest()
28 0xD6, 0x75}}}, in DeviceUpdaterTest()
31 {10, 100, 0xFFFFFFFF, 0, 0, 139, 1024, "VersionString3"}}; in DeviceUpdaterTest()
48 package.seekg(0); in TEST_F()
55 package.seekg(0); in TEST_F()
63 EXPECT_EQ(fwDeviceIDRecords[0], fwDeviceIDRecord); in TEST_F()
69 DeviceUpdater deviceUpdater(0, package, fwDeviceIDRecord, compImageInfos, in TEST_F()
74 reqFwDataReq{0x8A, 0x05, 0x15, 0x00, 0x00, 0x00, in TEST_F()
[all …]
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| /openbmc/qemu/tests/unit/ |
| H A D | test-crypto-der.c | 27 "\x30\x82\x01\x39" /* SEQUENCE, offset: 0, length: 313 */
33 "\x56\x82\xdf\x39\xf3\x3b\x1d\x62\x26\x97\xb7\x93\x25\xc7\xec\x7e"
38 "\xd1\x26\x6a\x1c\x83\xcc\xf4\x1f\x53\x42\x72\x1f\x62\x57\x0a\xc4"
60 "\x30\x82\x04\xa6" /* SEQUENCE, offset: 0, length 1190 */
114 "\x9e\x48\x36\x62\x0b\x05\xfa\x38\xc1\x06\x04\x58\x95\x4d\x25\x13"
151 "\x30\x53" /* SEQUENCE, offset 0, length 83 */
160 "\x58\xfb\x36\x10\x52\xb7\x01\x62\x0e\x94\x51\x1d\xe2\xef\x10\x82"
164 "\x30\x77" /* SEQUENCE, offset 0, length 119 */
169 "\xa0\x0a" /* CONTEXT SPECIFIC 0, offset 39, length 10 */
176 "\xe3\xb9\xba\x2f\x58\x63\x32\x62\x62\x54\x07\x27\xf9\x5a\x3a\xc7"
[all …]
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| /openbmc/u-boot/lib/ |
| H A D | crc7.c | 14 0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f,
15 0x48, 0x41, 0x5a, 0x53, 0x6c, 0x65, 0x7e, 0x77,
16 0x19, 0x10, 0x0b, 0x02, 0x3d, 0x34, 0x2f, 0x26,
17 0x51, 0x58, 0x43, 0x4a, 0x75, 0x7c, 0x67, 0x6e,
18 0x32, 0x3b, 0x20, 0x29, 0x16, 0x1f, 0x04, 0x0d,
19 0x7a, 0x73, 0x68, 0x61, 0x5e, 0x57, 0x4c, 0x45,
20 0x2b, 0x22, 0x39, 0x30, 0x0f, 0x06, 0x1d, 0x14,
21 0x63, 0x6a, 0x71, 0x78, 0x47, 0x4e, 0x55, 0x5c,
22 0x64, 0x6d, 0x76, 0x7f, 0x40, 0x49, 0x52, 0x5b,
23 0x2c, 0x25, 0x3e, 0x37, 0x08, 0x01, 0x1a, 0x13,
[all …]
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| /openbmc/qemu/qga/ |
| H A D | service-win32.h | 23 static const GUID GUID_VIOSERIAL_PORT = { 0x6fde7521, 0x1b65, 0x48ae,
24 { 0xb6, 0x28, 0x80, 0xbe, 0x62, 0x1, 0x60, 0x26 } };
|
| /openbmc/libcper/ |
| H A D | Cper.c | 19 EFI_GUID gEfiEventNotificationTypeCmcGuid = { 0x2DCE8BB1,
20 0xBDD7,
21 0x450e,
22 { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB,
23 0xD4, 0xF8, 0x90 } };
24 EFI_GUID gEfiEventNotificationTypeCpeGuid = { 0x4E292F96,
25 0xD843,
26 0x4a55,
27 { 0xA8, 0xC2, 0xD4, 0x81, 0xF2,
28 0x7E, 0xBE, 0xEE } };
[all …]
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| /openbmc/u-boot/include/power/ |
| H A D | max17042_fg.h | 12 MAX17042_STATUS = 0x00,
13 MAX17042_SOCREP = 0x06,
14 MAX17042_VCELL = 0x09,
15 MAX17042_CURRENT = 0x0A,
16 MAX17042_AVG_CURRENT = 0x0B,
17 MAX17042_SOCMIX = 0x0D,
18 MAX17042_SOCAV = 0x0E,
19 MAX17042_DESIGN_CAP = 0x18,
20 MAX17042_AVG_VCELL = 0x19,
21 MAX17042_CONFIG = 0x1D,
[all …]
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| /openbmc/qemu/hw/rx/ |
| H A D | rx62n.c | 38 #define RX62N_IRAM_BASE 0x00000000
39 #define RX62N_DFLASH_BASE 0x00100000
40 #define RX62N_CFLASH_BASE 0xfff80000
46 #define RX62N_ICU_BASE 0x00087000
47 #define RX62N_TMR_BASE 0x00088200
48 #define RX62N_CMT_BASE 0x00088000
49 #define RX62N_SCI_BASE 0x00088240
79 * 0x00 - 0x91: IPR no (IPR00 to IPR91)
80 * 0xff: IPR not assigned
84 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
[all …]
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| /openbmc/u-boot/arch/mips/include/asm/ |
| H A D | malta.h | 10 #define MALTA_GT_BASE 0x1be00000
11 #define MALTA_GT_PCIIO_BASE 0x18000000
12 #define MALTA_GT_UART0_BASE (MALTA_GT_PCIIO_BASE + 0x3f8)
14 #define MALTA_MSC01_BIU_BASE 0x1bc80000
15 #define MALTA_MSC01_PCI_BASE 0x1bd00000
16 #define MALTA_MSC01_PBC_BASE 0x1bd40000
17 #define MALTA_MSC01_IP1_BASE 0x1bc00000
18 #define MALTA_MSC01_IP1_SIZE 0x00400000
19 #define MALTA_MSC01_IP2_BASE1 0x10000000
20 #define MALTA_MSC01_IP2_SIZE1 0x08000000
[all …]
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| /openbmc/u-boot/arch/arm/include/asm/arch-imx/ |
| H A D | cpu.h | 6 #define MXC_CPU_MX23 0x23
7 #define MXC_CPU_MX25 0x25
8 #define MXC_CPU_MX27 0x27
9 #define MXC_CPU_MX28 0x28
10 #define MXC_CPU_MX31 0x31
11 #define MXC_CPU_MX35 0x35
12 #define MXC_CPU_MX51 0x51
13 #define MXC_CPU_MX53 0x53
14 #define MXC_CPU_MX6SL 0x60
15 #define MXC_CPU_MX6DL 0x61
[all …]
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| /openbmc/qemu/linux-user/hexagon/ |
| H A D | target_elf.h | 28 if (eflags == 0x04 || /* v5 */ in cpu_get_model()
29 eflags == 0x05 || /* v55 */ in cpu_get_model()
30 eflags == 0x60 || /* v60 */ in cpu_get_model()
31 eflags == 0x61 || /* v61 */ in cpu_get_model()
32 eflags == 0x62 || /* v62 */ in cpu_get_model()
33 eflags == 0x65 || /* v65 */ in cpu_get_model()
34 eflags == 0x66 || /* v66 */ in cpu_get_model()
35 eflags == 0x67 || /* v67 */ in cpu_get_model()
36 eflags == 0x8067 || /* v67t */ in cpu_get_model()
37 eflags == 0x68 || /* v68 */ in cpu_get_model()
[all …]
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| /openbmc/qemu/include/hw/southbridge/ |
| H A D | piix.h | 22 #define PIIX_PIRQCA 0x60
23 #define PIIX_PIRQCB 0x61
24 #define PIIX_PIRQCC 0x62
25 #define PIIX_PIRQCD 0x63
29 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
31 #define PIIX_RCR_IOPORT 0xcf9
|
| /openbmc/u-boot/drivers/power/regulator/ |
| H A D | palmas_regulator.c | 18 #define REGULATOR_ON 0x1
19 #define REGULATOR_OFF 0x0
21 #define SMPS_MODE_MASK 0x3
22 #define SMPS_MODE_SHIFT 0x0
23 #define LDO_MODE_MASK 0x1
24 #define LDO_MODE_SHIFT 0x0
27 {0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38, 0x3c},
28 {0x20, 0x24, 0x28, 0x2c, 0x30, 0x34, 0x38},
29 {0x20, 0x24, 0x2c, 0x30, 0x38},
33 {0x23, 0x27, 0x2b, 0x2f, 0x33, 0x37, 0x3b, 0x3c},
[all …]
|