Searched +full:0 +full:x5ffff (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/ |
H A D | nvidia,tegra-ccplex-cluster.yaml | 21 pattern: "ccplex@([0-9a-f]+)$" 48 reg = <0x0e000000 0x5ffff>;
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_dmc_regs.h | 12 #define DMC_SSP_BASE_ADDR_GEN9 0x00002FC0 14 #define _PIPEDMC_CONTROL_A 0x45250 15 #define _PIPEDMC_CONTROL_B 0x45254 19 #define PIPEDMC_ENABLE REG_BIT(0) 21 #define MTL_PIPEDMC_CONTROL _MMIO(0x45250) 24 #define _ADLP_PIPEDMC_REG_MMIO_BASE_A 0x5f000 25 #define _TGL_PIPEDMC_REG_MMIO_BASE_A 0x92000 30 0x400 * ((dmc_id) - 1)) 32 #define __DMC_REG_MMIO_BASE 0x8f000 43 #define _DMC_EVT_HTP_0 0x8f004 [all …]
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/openbmc/qemu/tests/unit/ |
H A D | test-resv-mem.c | 16 #define DEBUG 0 22 int i = 0; in print_ranges() 31 printf("%s rev[%i] = [0x%"PRIx64",0x%"PRIx64"]\n", in print_ranges() 95 in = insert_sorted_range(in, 0x10000, UINT64_MAX); in check_range_reverse_array() 96 expected = insert_sorted_range(expected, 0x0, 0xFFFF); in check_range_reverse_array() 97 run_range_inverse_array("test1", &in, &expected, 0x0, UINT64_MAX); in check_range_reverse_array() 101 in = insert_sorted_range(in, 0x10000, 0xFFFFFFFFFFFF); in check_range_reverse_array() 102 expected = insert_sorted_range(expected, 0x0, 0xFFFF); in check_range_reverse_array() 103 expected = insert_sorted_range(expected, 0x1000000000000, UINT64_MAX); in check_range_reverse_array() 104 run_range_inverse_array("test1", &in, &expected, 0x0, UINT64_MAX); in check_range_reverse_array() [all …]
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/openbmc/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra234.dtsi | 19 bus@0 { 24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; 28 reg = <0x0 0x00100000 0x0 0xf000>, 29 <0x0 0x0010f000 0x0 0x1000>; 35 reg = <0x0 0x02080000 0x0 0x00121000>; 36 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 58 reg = <0x0 0x02200000 0x0 0x10000>, 59 <0x0 0x02210000 0x0 0x10000>; 112 gpio-ranges = <&pinmux 0 0 164>; 117 reg = <0x0 0x2430000 0x0 0x19100>; [all …]
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