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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-nand.dtso13 fragment@0 {
17 #size-cells = <0>;
18 spi_nand: spi_nand@0 {
20 reg = <0>;
30 partition@0 {
32 reg = <0x0 0x100000>;
38 reg = <0x100000 0x280000>;
43 reg = <0x380000 0x200000>;
49 reg = <0x580000 0x7a80000>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/openbmc/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Ddma4_core_regs.h22 #define mmDMA4_CORE_CFG_0 0x580000
24 #define mmDMA4_CORE_CFG_1 0x580004
26 #define mmDMA4_CORE_LBW_MAX_OUTSTAND 0x580008
28 #define mmDMA4_CORE_SRC_BASE_LO 0x580014
30 #define mmDMA4_CORE_SRC_BASE_HI 0x580018
32 #define mmDMA4_CORE_DST_BASE_LO 0x58001C
34 #define mmDMA4_CORE_DST_BASE_HI 0x580020
36 #define mmDMA4_CORE_SRC_TSIZE_1 0x58002C
38 #define mmDMA4_CORE_SRC_STRIDE_1 0x580030
40 #define mmDMA4_CORE_SRC_TSIZE_2 0x580034
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interconnect/
H A Dinterconnect.txt30 reg = <0x580000 0x14000>;
83 cpu@0 {
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmarvell,armada-cp110-utmi-phy.yaml18 0.H----- USB HOST0
20 0.D-----0
37 const: 0
47 "^usb-phy@[0|1]$":
58 const: 0
79 reg = <0x580000 0x2000>;
82 #size-cells = <0>;
84 cp0_utmi0: usb-phy@0 {
85 reg = <0>;
86 #phy-cells = <0>;
[all …]
/openbmc/linux/drivers/net/ethernet/cavium/thunder/
H A Dnic_reg.h13 #define NIC_PF_CFG (0x0000)
14 #define NIC_PF_STATUS (0x0010)
15 #define NIC_PF_INTR_TIMER_CFG (0x0030)
16 #define NIC_PF_BIST_STATUS (0x0040)
17 #define NIC_PF_SOFT_RESET (0x0050)
18 #define NIC_PF_TCP_TIMER (0x0060)
19 #define NIC_PF_BP_CFG (0x0080)
20 #define NIC_PF_RRM_CFG (0x0088)
21 #define NIC_PF_CQM_CFG (0x00A0)
22 #define NIC_PF_CNM_CF (0x00A8)
[all …]
/openbmc/qemu/hw/ppc/
H A Dpnv_occ.c30 #define OCB_OCI_OCCMISC 0x4020
31 #define OCB_OCI_OCCMISC_AND 0x4021
32 #define OCB_OCI_OCCMISC_OR 0x4022
35 #define OCC_SENSOR_DATA_BLOCK_OFFSET 0x580000
36 #define OCC_SENSOR_DATA_VALID 0x580001
37 #define OCC_SENSOR_DATA_VERSION 0x580002
38 #define OCC_SENSOR_DATA_READING_VERSION 0x580004
39 #define OCC_SENSOR_DATA_NR_SENSORS 0x580008
40 #define OCC_SENSOR_DATA_NAMES_OFFSET 0x580010
41 #define OCC_SENSOR_DATA_READING_PING_OFFSET 0x580014
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-wedge400.dts62 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
75 #size-cells = <0>;
83 tpm@0 {
86 reg = <0>;
104 flash1@0 {
105 reg = <0x0 0x8000000>;
114 pinctrl-0 = <&pinctrl_txd2_default
121 pinctrl-0 = <&pinctrl_txd4_default
126 * I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC
145 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a-ten64.dts55 led-0 {
74 tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
178 reg = <0xc>;
182 reg = <0xd>;
186 reg = <0xe>;
190 reg = <0xf>;
194 reg = <0x1c>;
198 reg = <0x1d>;
202 reg = <0x1e>;
206 reg = <0x1f>;
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dksi8560.dts33 #size-cells = <0>;
35 PowerPC,8560@0 {
37 reg = <0>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
43 bus-frequency = <0>; /* From U-boot */
44 clock-frequency = <0>; /* From U-boot */
51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
58 ranges = <0x00000000 0xfdf00000 0x00100000>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-cp110-slave.dtsi62 ranges = <0x0 0x0 0xf4000000 0x2000000>;
64 cps_ethernet: ethernet@0 {
66 reg = <0x0 0x100000>, <0x129000 0xb000>;
74 port-id = <0>;
75 gop-port-id = <0>;
96 #size-cells = <0>;
98 reg = <0x12a200 0x10>;
104 reg = <0x440000 0x1000>;
125 reg = <0x440000 0x20>;
127 max-func = <0xf>;
[all …]
H A Darmada-cp110-master.dtsi62 ranges = <0x0 0x0 0xf2000000 0x2000000>;
64 cpm_ethernet: ethernet@0 {
66 reg = <0x0 0x100000>, <0x129000 0xb000>;
74 port-id = <0>;
75 gop-port-id = <0>;
96 #size-cells = <0>;
98 reg = <0x12a200 0x10>;
104 reg = <0x440000 0x1000>;
126 reg = <0x440000 0x20>;
128 max-func = <0xf>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-cp11x.dtsi29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
58 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60 CP11X_LABEL(ethernet): ethernet@0 {
62 #size-cells = <0>;
64 reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
74 CP11X_LABEL(eth0): ethernet-port@0 {
88 reg = <0>;
89 port-id = <0>; /* For backward compatibility. */
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-guardian.dts22 cpu@0 {
29 reg = <0x80000000 0x10000000>; /* 256 MB */
34 pinctrl-0 = <&guardian_button_pins>;
54 pinctrl-0 = <&guardian_led_pins>;
73 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
87 hsync-active = <0>;
88 vsync-active = <0>;
93 ac-bias-intrpt = <0>;
97 fdd = <0x80>;
98 sync-edge = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi14 reg = <0x00000000 0x04000000>,
15 <0x08000000 0x04000000>;
20 reg = <0x10210000 0x1000>;
37 reg = <0x101e2000 0x1000>;
46 reg = <0x101e3000 0x1000>;
55 reg = <0x101e4000 0x80>;
62 gpio-bank = <0>;
63 gpio-ranges = <&pinctrl 0 0 32>;
69 reg = <0x101e5000 0x80>;
77 gpio-ranges = <&pinctrl 0 32 32>;
[all …]
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-hdmi.c25 /* REG: 0x00 */
26 #define RK3228_PRE_PLL_REFCLK_SEL_PCLK BIT(0)
27 /* REG: 0x01 */
30 #define RK3228_BYPASS_PLLPD_EN BIT(0)
31 /* REG: 0x02 */
33 #define RK3228_PDATAEN_DISABLE BIT(0)
34 /* REG: 0x03 */
36 #define RK3228_AUTO_TERM_RES_CAL_SPEED_14_8(x) UPDATE(x, 6, 0)
37 /* REG: 0x04 */
38 #define RK3228_AUTO_TERM_RES_CAL_SPEED_7_0(x) UPDATE(x, 7, 0)
[all …]
/openbmc/linux/drivers/phy/microchip/
H A Dsparx5_serdes.c31 #define SPX5_SERDES_QUIET_MODE_VAL 0x01ef4e0c
34 SPX5_SD10G28_CMU_MAIN = 0,
353 .cfg_en_adv = 0,
355 .cfg_en_dly = 0,
356 .cfg_tap_adv_3_0 = 0,
358 .cfg_tap_dly_4_0 = 0,
359 .cfg_eq_c_force_3_0 = 0xf,
368 .cfg_tap_adv_3_0 = 0,
370 .cfg_tap_dly_4_0 = 0x10,
371 .cfg_eq_c_force_3_0 = 0xf,
[all …]
/openbmc/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc29 { "LBEG", 0, 0 },
30 { "LEND", 1, 0 },
31 { "LCOUNT", 2, 0 },
32 { "PTEVADDR", 83, 0 },
33 { "DDR", 104, 0 },
34 { "176", 176, 0 },
35 { "208", 208, 0 },
36 { "INTERRUPT", 226, 0 },
37 { "INTCLEAR", 227, 0 },
38 { "CCOUNT", 234, 0 },
[all …]
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "ACCLO", 16, 0 },
36 { "ACCHI", 17, 0 },
37 { "M0", 32, 0 },
38 { "M1", 33, 0 },
39 { "M2", 34, 0 },
40 { "M3", 35, 0 },
[all …]
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dxtensa-modules.c.inc31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "ACCLO", 16, 0 },
36 { "ACCHI", 17, 0 },
37 { "M0", 32, 0 },
38 { "M1", 33, 0 },
39 { "M2", 34, 0 },
40 { "M3", 35, 0 },
[all …]
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "MMID", 89, 0 },
36 { "DDR", 104, 0 },
37 { "176", 176, 0 },
38 { "208", 208, 0 },
39 { "INTERRUPT", 226, 0 },
40 { "INTCLEAR", 227, 0 },
[all …]