Searched +full:0 +full:x4a101000 (Results 1 – 5 of 5) sorted by relevance
16 #define UART0_BASE 0x44E0900017 #define UART1_BASE 0x4802200018 #define UART2_BASE 0x4802400019 #define UART3_BASE 0x481A600020 #define UART4_BASE 0x481A800021 #define UART5_BASE 0x481AA00024 #define GPIO2_BASE 0x481AC00027 #define WDT_BASE 0x44E3500030 #define CTRL_BASE 0x44E1000031 #define CTRL_DEVICE_BASE 0x44E10600[all …]
16 #define L3F_CFG_BWLIMITER 0x4400520019 #define UART0_BASE 0x44E0900022 #define GPIO2_BASE 0x481AC00025 #define WDT_BASE 0x44E3500028 #define CTRL_BASE 0x44E1000029 #define CTRL_DEVICE_BASE 0x44E1060032 #define PRCM_BASE 0x44DF000033 #define CM_WKUP 0x44DF280034 #define CM_PER 0x44DF880035 #define CM_DPLL 0x44DF4200[all …]
77 #size-cells = <0>;78 reg = <0x4a101000 0x1000>;
46 #size-cells = <0>;47 cpu@0 {50 reg = <0>;73 opp-supported-hw = <0x06 0x0010>;80 opp-supported-hw = <0x01 0x00FF>;87 opp-supported-hw = <0x06 0x0020>;94 opp-supported-hw = <0x01 0xFFFF>;100 opp-supported-hw = <0x06 0x0040>;106 opp-supported-hw = <0x01 0xFFFF>;112 opp-supported-hw = <0x06 0x0080>;[all …]
33 #size-cells = <0>;34 cpu: cpu@0 {37 reg = <0>;50 reg = <0x48241000 0x1000>,51 <0x48240100 0x0100>;59 reg = <0x48281000 0x1000>;65 reg = <0x48242000 0x1000>;76 reg = <0x44000000 0x40000077 0x44800000 0x400000>;85 ranges = <0 0x44c00000 0x287000>;[all …]