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/openbmc/u-boot/arch/arm/mach-uniphier/sbc/
H A Dsbc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011-2015 Panasonic Corporation
4 * Copyright (C) 2015-2017 Socionext Inc.
11 #include "sbc-regs.h"
13 #define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000
14 #define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500
15 #define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020
17 #define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000
18 #define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500
19 #define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010
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/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
16 within each bank to the CPU-viewed address. The needed setup includes the
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
25 const: socionext,uniphier-system-bus
30 "#address-cells":
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