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/openbmc/linux/include/linux/soc/ixp4xx/
H A Dqmgr.h12 #define DEBUG_QMGR 0
25 #define QUEUE_WATERMARK_0_ENTRIES 0
35 #define QUEUE_IRQ_SRC_EMPTY 0
45 u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 0x000 - 0x3FF */
46 u32 stat1[4]; /* 0x400 - 0x40F */
47 u32 stat2[2]; /* 0x410 - 0x417 */
48 u32 statne_h; /* 0x418 - queue nearly empty */
49 u32 statf_h; /* 0x41C - queue full */
50 u32 irqsrc[4]; /* 0x420 - 0x42F IRC source */
51 u32 irqen[2]; /* 0x430 - 0x437 IRQ enabled */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sdm660-venus.yaml113 reg = <0x0cc00000 0xff000>;
119 interconnects = <&gnoc 0 &mnoc 13>,
123 iommus = <&mmss_smmu 0x400>,
124 <&mmss_smmu 0x401>,
125 <&mmss_smmu 0x40a>,
126 <&mmss_smmu 0x407>,
127 <&mmss_smmu 0x40e>,
128 <&mmss_smmu 0x40f>,
129 <&mmss_smmu 0x408>,
130 <&mmss_smmu 0x409>,
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/include/
H A Dddc_service_types.h29 #define DP_BRANCH_DEVICE_ID_0010FA 0x0010FA
31 #define DP_BRANCH_DEVICE_ID_0022B9 0x0022B9
32 #define DP_BRANCH_DEVICE_ID_00001A 0x00001A
33 #define DP_BRANCH_DEVICE_ID_0080E1 0x0080e1
34 #define DP_BRANCH_DEVICE_ID_90CC24 0x90CC24
35 #define DP_BRANCH_DEVICE_ID_00E04C 0x00E04C
36 #define DP_BRANCH_DEVICE_ID_006037 0x006037
37 #define DP_BRANCH_DEVICE_ID_001CF8 0x001CF8
38 #define DP_BRANCH_DEVICE_ID_0060AD 0x0060AD
39 #define DP_BRANCH_HW_REV_10 0x10
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_d.h27 #define mmIH_VMID_0_LUT 0xf50
28 #define mmIH_VMID_1_LUT 0xf51
29 #define mmIH_VMID_2_LUT 0xf52
30 #define mmIH_VMID_3_LUT 0xf53
31 #define mmIH_VMID_4_LUT 0xf54
32 #define mmIH_VMID_5_LUT 0xf55
33 #define mmIH_VMID_6_LUT 0xf56
34 #define mmIH_VMID_7_LUT 0xf57
35 #define mmIH_VMID_8_LUT 0xf58
36 #define mmIH_VMID_9_LUT 0xf59
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/openbmc/linux/drivers/media/i2c/s5c73m3/
H A Ds5c73m3-ctrls.c64 if (state->power == 0) in s5c73m3_g_volatile_ctrl()
75 return 0; in s5c73m3_g_volatile_ctrl()
89 for (i = 0; i < ARRAY_SIZE(colorfx); i++) { in s5c73m3_set_colorfx()
90 if (colorfx[i][0] != val) in s5c73m3_set_colorfx()
108 int ret = 0; in s5c73m3_set_exposure()
152 for (i = 0; i < ARRAY_SIZE(wb); i++) { in s5c73m3_set_white_balance()
153 if (wb[i][0] != val) in s5c73m3_set_white_balance()
186 int ret = 0; in s5c73m3_3a_lock()
218 if (ret != 0) in s5c73m3_set_auto_focus()
227 ret = s5c73m3_af_run(state, 0); in s5c73m3_set_auto_focus()
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/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddc.h176 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
177 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
179 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
180 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
181 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
182 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
183 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
184 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
185 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
186 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
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/openbmc/u-boot/include/dt-bindings/pinctrl/
H A Dstm32f746-pinfunc.h4 #define STM32F746_PA0_FUNC_GPIO 0x0
5 #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
6 #define STM32F746_PA0_FUNC_TIM5_CH1 0x3
7 #define STM32F746_PA0_FUNC_TIM8_ETR 0x4
8 #define STM32F746_PA0_FUNC_USART2_CTS 0x8
9 #define STM32F746_PA0_FUNC_UART4_TX 0x9
10 #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb
11 #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc
12 #define STM32F746_PA0_FUNC_EVENTOUT 0x10
13 #define STM32F746_PA0_FUNC_ANALOG 0x11
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H A Dstm32h7-pinfunc.h4 #define STM32H7_PA0_FUNC_GPIO 0x0
5 #define STM32H7_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
6 #define STM32H7_PA0_FUNC_TIM5_CH1 0x3
7 #define STM32H7_PA0_FUNC_TIM8_ETR 0x4
8 #define STM32H7_PA0_FUNC_TIM15_BKIN 0x5
9 #define STM32H7_PA0_FUNC_USART2_CTS_NSS 0x8
10 #define STM32H7_PA0_FUNC_UART4_TX 0x9
11 #define STM32H7_PA0_FUNC_SDMMC2_CMD 0xa
12 #define STM32H7_PA0_FUNC_SAI2_SD_B 0xb
13 #define STM32H7_PA0_FUNC_ETH_MII_CRS 0xc
[all …]
/openbmc/linux/drivers/media/pci/cx88/
H A Dcx88-core.c58 } while (0)
67 * @lpi: lines per IRQ, or 0 to not generate irqs. Note: IRQ to be
80 (*rp++) = 0; in cx88_risc_field()
89 for (line = 0; line < lines; line++) { in cx88_risc_field()
94 if (lpi && line > 0 && !(line % lpi)) in cx88_risc_field()
111 offset = 0; in cx88_risc_field()
138 fields = 0; in cx88_risc_buffer()
154 risc->dma = 0; in cx88_risc_buffer()
163 rp = cx88_risc_field(rp, sglist, top_offset, 0, in cx88_risc_buffer()
164 bpl, padding, lines, 0, true); in cx88_risc_buffer()
[all …]
/openbmc/linux/drivers/net/ethernet/3com/
H A D3c515.c86 /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */
100 aliased registers at <base>+0x400.
102 #define CORKSCREW_TOTAL_SIZE 0x20
172 #define EL3_CMD 0x0e
173 #define EL3_STATUS 0x0e
182 TotalReset = 0 << 11, SelectWindow = 1 << 11, StartCoax = 2 << 11,
201 IntLatch = 0x0001, AdapterFailure = 0x0002, TxComplete = 0x0004,
202 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
203 IntReq = 0x0040, StatsFull = 0x0080,
210 On the Corkscrew this window is always mapped at offsets 0x10-0x1f. */
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm630.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
48 #size-cells = <0>;
53 reg = <0x0 0x100>;
73 reg = <0x0 0x101>;
88 reg = <0x0 0x102>;
103 reg = <0x0 0x103>;
115 CPU4: cpu@0 {
118 reg = <0x0 0x0>;
138 reg = <0x0 0x1>;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmDCFEV0_PG_CONFIG 0x2db
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H A Ddce_10_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
H A Ddce_11_2_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Dcore.h22 #define MASKBYTE0 0xff
23 #define MASKBYTE1 0xff00
24 #define MASKBYTE2 0xff0000
25 #define MASKBYTE3 0xff000000
26 #define MASKBYTE4 0xff00000000ULL
27 #define MASKHWORD 0xffff0000
28 #define MASKLWORD 0x0000ffff
29 #define MASKDWORD 0xffffffff
30 #define RFREG_MASK 0xfffff
31 #define INV_RF_DATA 0xffffffff
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/openbmc/linux/drivers/hwmon/
H A Dnct6775-core.c22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
[all …]