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/openbmc/linux/include/dt-bindings/reset/
H A Dhisi,hi6220-resets.h9 #define PERIPH_RSTDIS0_MMC0 0x000
10 #define PERIPH_RSTDIS0_MMC1 0x001
11 #define PERIPH_RSTDIS0_MMC2 0x002
12 #define PERIPH_RSTDIS0_NANDC 0x003
13 #define PERIPH_RSTDIS0_USBOTG_BUS 0x004
14 #define PERIPH_RSTDIS0_POR_PICOPHY 0x005
15 #define PERIPH_RSTDIS0_USBOTG 0x006
16 #define PERIPH_RSTDIS0_USBOTG_32K 0x007
17 #define PERIPH_RSTDIS1_HIFI 0x100
18 #define PERIPH_RSTDIS1_DIGACODEC 0x105
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sdm660-venus.yaml113 reg = <0x0cc00000 0xff000>;
119 interconnects = <&gnoc 0 &mnoc 13>,
123 iommus = <&mmss_smmu 0x400>,
124 <&mmss_smmu 0x401>,
125 <&mmss_smmu 0x40a>,
126 <&mmss_smmu 0x407>,
127 <&mmss_smmu 0x40e>,
128 <&mmss_smmu 0x40f>,
129 <&mmss_smmu 0x408>,
130 <&mmss_smmu 0x409>,
[all …]
/openbmc/linux/arch/arc/include/asm/
H A Dirqflags-arcv2.h21 #define CLRI_STATUS_E_MASK 0xF
24 #define AUX_USER_SP 0x00D
25 #define AUX_IRQ_CTRL 0x00E
26 #define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
27 #define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */
28 #define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */
29 #define AUX_IRQ_PRIORITY 0x206
30 #define ICAUSE 0x40a
31 #define AUX_IRQ_SELECT 0x40b
32 #define AUX_IRQ_ENABLE 0x40c
[all …]
/openbmc/linux/arch/x86/pci/
H A Dolpc.c33 * the size of the region by writing ~0 to a base address register
38 * ~0 to a base address register.
41 static const uint32_t lxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
42 0x0, 0x0, 0x0, 0x0,
43 0x0, 0x0, 0x0, 0x0,
45 0x281022, 0x2200005, 0x6000021, 0x80f808, /* AMD Vendor ID */
46 0x0, 0x0, 0x0, 0x0, /* No virtual registers, hence no BAR */
47 0x0, 0x0, 0x0, 0x28100b,
48 0x0, 0x0, 0x0, 0x0,
49 0x0, 0x0, 0x0, 0x0,
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_d.h27 #define mmIH_VMID_0_LUT 0xf50
28 #define mmIH_VMID_1_LUT 0xf51
29 #define mmIH_VMID_2_LUT 0xf52
30 #define mmIH_VMID_3_LUT 0xf53
31 #define mmIH_VMID_4_LUT 0xf54
32 #define mmIH_VMID_5_LUT 0xf55
33 #define mmIH_VMID_6_LUT 0xf56
34 #define mmIH_VMID_7_LUT 0xf57
35 #define mmIH_VMID_8_LUT 0xf58
36 #define mmIH_VMID_9_LUT 0xf59
[all …]
/openbmc/u-boot/drivers/net/
H A Dmtk_eth.h13 #define PDMA_BASE 0x0800
14 #define GDMA1_BASE 0x0500
15 #define GDMA2_BASE 0x1500
16 #define GMAC_BASE 0x10000
20 #define ETHSYS_SYSCFG0_REG 0x14
22 #define SYSCFG0_GE_MODE_M 0x3
24 #define ETHSYS_CLKCFG0_REG 0x2c
28 #define GE_MODE_RGMII 0
36 #define TX_BASE_PTR_REG(n) (0x000 + (n) * 0x10)
37 #define TX_MAX_CNT_REG(n) (0x004 + (n) * 0x10)
[all …]
/openbmc/linux/include/linux/mfd/mt6331/
H A Dregisters.h10 #define MT6331_STRUP_CON0 0x0
11 #define MT6331_STRUP_CON2 0x2
12 #define MT6331_STRUP_CON3 0x4
13 #define MT6331_STRUP_CON4 0x6
14 #define MT6331_STRUP_CON5 0x8
15 #define MT6331_STRUP_CON6 0xA
16 #define MT6331_STRUP_CON7 0xC
17 #define MT6331_STRUP_CON8 0xE
18 #define MT6331_STRUP_CON9 0x10
19 #define MT6331_STRUP_CON10 0x12
[all …]
/openbmc/linux/include/uapi/linux/
H A Delf.h26 #define PT_NULL 0
34 #define PT_LOOS 0x60000000 /* OS-specific */
35 #define PT_HIOS 0x6fffffff /* OS-specific */
36 #define PT_LOPROC 0x70000000
37 #define PT_HIPROC 0x7fffffff
38 #define PT_GNU_EH_FRAME (PT_LOOS + 0x474e550)
39 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
40 #define PT_GNU_RELRO (PT_LOOS + 0x474e552)
41 #define PT_GNU_PROPERTY (PT_LOOS + 0x474e553)
45 #define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 0x2)
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Ddc.h12 /* CMD register 0x000 ~ 0x43 */
14 /* Address 0x000 ~ 0x002 */
21 /* Address 0x008 ~ 0x00a */
28 /* Address 0x010 ~ 0x012 */
35 /* Address 0x018 ~ 0x01a */
42 /* Address 0x028 */
47 /* Address 0x030 ~ 0x033 */
55 /* Address 0x036 ~ 0x03e */
68 /* Address 0x040 ~ 0x043 */
80 /* COM register 0x300 ~ 0x329 */
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dmacmodes.c32 #define DEFAULT_MODEDB_INDEX 0
38 0, FB_VMODE_NONINTERLACED
42 0, FB_VMODE_NONINTERLACED
46 0, FB_VMODE_NONINTERLACED
50 0, FB_VMODE_NONINTERLACED
70 0, FB_VMODE_NONINTERLACED
74 0, FB_VMODE_NONINTERLACED
78 0, FB_VMODE_NONINTERLACED
94 0, FB_VMODE_NONINTERLACED
109 #if 0
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dd11.h27 #define RX_FIFO 0 /* data and ctl frames */
31 #define TX_AC_BK_FIFO 0 /* Background TX FIFO */
41 #define M_AC_TXLMT_BASE_ADDR (0x180 * 2)
109 u32 PAD[3]; /* 0x0 - 0x8 */
110 u32 biststatus; /* 0xC */
111 u32 biststatus2; /* 0x10 */
112 u32 PAD; /* 0x14 */
113 u32 gptimer; /* 0x18 */
114 u32 usectimer; /* 0x1c *//* for corerev >= 26 */
116 /* Interrupt Control *//* 0x20 */
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddc.h176 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
177 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
179 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
180 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
181 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
182 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
183 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
184 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
185 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
186 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
[all …]
/openbmc/linux/drivers/perf/
H A Dqcom_l2_pmu.c31 #define L2PMCR_NUM_EV_MASK 0x1F
33 #define L2PMCR 0x400
34 #define L2PMCNTENCLR 0x403
35 #define L2PMCNTENSET 0x404
36 #define L2PMINTENCLR 0x405
37 #define L2PMINTENSET 0x406
38 #define L2PMOVSCLR 0x407
39 #define L2PMOVSSET 0x408
40 #define L2PMCCNTCR 0x409
41 #define L2PMCCNTR 0x40A
[all …]
/openbmc/linux/include/linux/mfd/
H A Dtps6594.h26 /* Registers for page 0 of TPS6594 */
27 #define TPS6594_REG_DEV_REV 0x01
29 #define TPS6594_REG_NVM_CODE_1 0x02
30 #define TPS6594_REG_NVM_CODE_2 0x03
32 #define TPS6594_REG_BUCKX_CTRL(buck_inst) (0x04 + ((buck_inst) << 1))
33 #define TPS6594_REG_BUCKX_CONF(buck_inst) (0x05 + ((buck_inst) << 1))
34 #define TPS6594_REG_BUCKX_VOUT_1(buck_inst) (0x0e + ((buck_inst) << 1))
35 #define TPS6594_REG_BUCKX_VOUT_2(buck_inst) (0x0f + ((buck_inst) << 1))
36 #define TPS6594_REG_BUCKX_PG_WINDOW(buck_inst) (0x18 + (buck_inst))
38 #define TPS6594_REG_LDOX_CTRL(ldo_inst) (0x1d + (ldo_inst))
[all …]
/openbmc/linux/drivers/net/dsa/
H A Dmt7530.h12 #define MT7530_ALL_MEMBERS 0xff
18 ID_MT7530 = 0,
26 #define TRGMII_BASE(x) (0x10000 + (x))
29 #define ETHSYS_CLKCFG0 0x2c
32 #define SYSC_REG_RSTCTRL 0x34
36 #define MT753X_AGC 0xc
40 #define MT7530_MFC 0x10
41 #define BC_FFP(x) (((x) & 0xff) << 24)
42 #define BC_FFP_MASK BC_FFP(~0)
43 #define UNM_FFP(x) (((x) & 0xff) << 16)
[all …]
/openbmc/linux/sound/pci/lx6464es/
H A Dlx_core.c23 0,
24 0x400,
25 0x401,
26 0x402,
27 0x403,
28 0x404,
29 0x405,
30 0x406,
31 0x407,
32 0x408,
[all …]
/openbmc/linux/include/linux/mfd/mt6357/
H A Dregisters.h10 #define MT6357_TOP0_ID 0x0
11 #define MT6357_TOP0_REV0 0x2
12 #define MT6357_TOP0_DSN_DBI 0x4
13 #define MT6357_TOP0_DSN_DXI 0x6
14 #define MT6357_HWCID 0x8
15 #define MT6357_SWCID 0xa
16 #define MT6357_PONSTS 0xc
17 #define MT6357_POFFSTS 0xe
18 #define MT6357_PSTSCTL 0x10
19 #define MT6357_PG_DEB_STS0 0x12
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/b43legacy/
H A Dmain.c55 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
57 # define modparam_pio 0
64 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
95 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
99 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
100 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
101 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
102 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
103 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
104 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm630.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
48 #size-cells = <0>;
53 reg = <0x0 0x100>;
73 reg = <0x0 0x101>;
88 reg = <0x0 0x102>;
103 reg = <0x0 0x103>;
115 CPU4: cpu@0 {
118 reg = <0x0 0x0>;
138 reg = <0x0 0x1>;
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dwm2200.h14 #define WM2200_CLKSRC_MCLK1 0
19 #define WM2200_FLL_SRC_MCLK1 0
26 #define WM2200_SOFTWARE_RESET 0x00
27 #define WM2200_DEVICE_REVISION 0x01
28 #define WM2200_TONE_GENERATOR_1 0x0B
29 #define WM2200_CLOCKING_3 0x102
30 #define WM2200_CLOCKING_4 0x103
31 #define WM2200_FLL_CONTROL_1 0x111
32 #define WM2200_FLL_CONTROL_2 0x112
33 #define WM2200_FLL_CONTROL_3 0x113
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmDCFEV0_PG_CONFIG 0x2db
[all …]
H A Ddce_10_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
H A Ddce_11_2_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Dcore.h22 #define MASKBYTE0 0xff
23 #define MASKBYTE1 0xff00
24 #define MASKBYTE2 0xff0000
25 #define MASKBYTE3 0xff000000
26 #define MASKBYTE4 0xff00000000ULL
27 #define MASKHWORD 0xffff0000
28 #define MASKLWORD 0x0000ffff
29 #define MASKDWORD 0xffffffff
30 #define RFREG_MASK 0xfffff
31 #define INV_RF_DATA 0xffffffff
[all …]
/openbmc/qemu/disas/
H A Dalpha.c65 #define AXP_OPCODE_BASE 0x0001 /* Base architecture -- all cpus. */
66 #define AXP_OPCODE_EV4 0x0002 /* EV4 specific PALcode insns. */
67 #define AXP_OPCODE_EV5 0x0004 /* EV5 specific PALcode insns. */
68 #define AXP_OPCODE_EV6 0x0008 /* EV6 specific PALcode insns. */
69 #define AXP_OPCODE_BWX 0x0100 /* Byte/word extension (amask bit 0). */
70 #define AXP_OPCODE_CIX 0x0200 /* "Count" extension (amask bit 1). */
71 #define AXP_OPCODE_MAX 0x0400 /* Multimedia extension (amask bit 8). */
76 #define AXP_OP(i) (((i) >> 26) & 0x3F)
79 #define AXP_NOPS 0x40
122 if ((o->flags & AXP_OPERAND_SIGNED) != 0
[all …]

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