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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_lsc.S18 lsi f0, a2, 0
24 movi a3, 0x3f800000
27 movi a3, 0x40000000
30 movi a3, 0x40400000
41 movi a3, 0x40800000
43 movi a3, 0x40a00000
45 movi a3, 0x40c00000
52 ssi f3, a2, 0
58 movi a3, 0x40800000
61 movi a3, 0x40a00000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dxlnx,xps-iic-2.00.a.yaml56 reg = < 0x40800000 0x10000 >;
58 #size-cells = <0>;
/openbmc/linux/arch/arm/nwfpe/
H A Dfpopcode.c19 { .high = 0x0000, .low = 0x0000000000000000ULL},/* extended 0.0 */
20 { .high = 0x3fff, .low = 0x8000000000000000ULL},/* extended 1.0 */
21 { .high = 0x4000, .low = 0x8000000000000000ULL},/* extended 2.0 */
22 { .high = 0x4000, .low = 0xc000000000000000ULL},/* extended 3.0 */
23 { .high = 0x4001, .low = 0x8000000000000000ULL},/* extended 4.0 */
24 { .high = 0x4001, .low = 0xa000000000000000ULL},/* extended 5.0 */
25 { .high = 0x3ffe, .low = 0x8000000000000000ULL},/* extended 0.5 */
26 { .high = 0x4002, .low = 0xa000000000000000ULL},/* extended 10.0 */
31 0x0000000000000000ULL, /* double 0.0 */
32 0x3ff0000000000000ULL, /* double 1.0 */
[all …]
/openbmc/u-boot/board/freescale/m5373evb/
H A DREADME70 CONFIG_SYS_UART_PORT -- define UART port number, start with 0, 1 and 2
114 Flash: 0x00000000-0x3FFFFFFF (1024MB)
115 DDR: 0x40000000-0x7FFFFFFF (1024MB)
116 SRAM: 0x80000000-0x8FFFFFFF (256MB)
117 IP: 0xF0000000-0xFFFFFFFF (256MB)
121 Flash0: 0x00000000-0x00FFFFFF (16MB)
123 DDR: 0x40000000-0x4FFFFFFF (256MB)
124 SRAM: 0x80000000-0x80007FFF (32KB)
125 IP: 0xFC000000-0xFC0FFFFF (64KB)
145 U-Boot 1.3.0 (Nov 8 2007 - 12:44:08)
[all …]
/openbmc/qemu/hw/arm/
H A Dcollie.c58 for (unsigned i = 0; i < 2; i++) { in collie_init()
59 DriveInfo *dinfo = drive_get(IF_PFLASH, 0, i); in collie_init()
63 FLASH_SECTOR_SIZE, 4, 0x00, 0x00, 0x00, 0x00, 0); in collie_init()
66 sysbus_create_simple("scoop", 0x40800000, NULL); in collie_init()
68 collie_binfo.board_id = 0x208; in collie_init()
/openbmc/qemu/linux-user/arm/nwfpe/
H A Dfpopcode.c30 { 0x0000000000000000ULL, 0x0000}, /* extended 0.0 */
31 { 0x8000000000000000ULL, 0x3fff}, /* extended 1.0 */
32 { 0x8000000000000000ULL, 0x4000}, /* extended 2.0 */
33 { 0xc000000000000000ULL, 0x4000}, /* extended 3.0 */
34 { 0x8000000000000000ULL, 0x4001}, /* extended 4.0 */
35 { 0xa000000000000000ULL, 0x4001}, /* extended 5.0 */
36 { 0x8000000000000000ULL, 0x3ffe}, /* extended 0.5 */
37 { 0xa000000000000000ULL, 0x4002} /* extended 10.0 */
41 const_float64(0x0000000000000000ULL), /* double 0.0 */
42 const_float64(0x3ff0000000000000ULL), /* double 1.0 */
[all …]
/openbmc/u-boot/include/configs/
H A Dodroid.h19 #define CONFIG_SYS_PL310_BASE 0x10502000
24 #define CONFIG_SYS_SDRAM_BASE 0x40000000
33 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
34 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
43 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
48 #define CONFIG_SYS_MONITOR_BASE 0x00000000
60 "uImage fat 0 1;" \
61 "zImage fat 0 1;" \
62 "Image.itb fat 0 1;" \
63 "uInitrd fat 0 1;" \
[all …]
/openbmc/qemu/tests/tcg/hexagon/
H A Dhex_test.h25 printf("ERROR at line %d: 0x%08x != 0x%08x\n", line, val, expect); in __check32()
35 printf("ERROR at line %d: 0x%016llx != 0x%016llx\n", line, val, expect); in __check64()
44 if (ret < 0) { in __chk_error()
55 printf("ERROR at line %d: 0x%p != 0x%p\n", line, p, expect); in __checkp()
65 printf("ERROR at line %d: 0x%08x == 0x%08x\n", line, val, expect); in __check32_ne()
75 printf("ERROR at line %d: 0x%016llx == 0x%016llx\n", line, val, expect); in __check64_ne()
83 #define USR_OVF_BIT 0 /* Sticky saturation overflow */
91 #define USR_CLEAR 0
99 /* Clear bits 0-5 in USR */
102 "r2 = and(r2, #0xffffffc0)\n\t" \
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml235 reg = <0x98000000 0x800000>;
244 ti,bootreg = <&scm_conf 0x304 0>;
250 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
251 resets = <&prm_tesla 0>, <&prm_tesla 1>;
268 reg = <0 0x95800000 0 0x3800000>;
280 reg = <0x55020000 0x10000>;
287 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
305 reg = <0x0 0x99000000 0x0 0x4000000>;
317 reg = <0x40800000 0x48000>,
318 <0x40e00000 0x8000>,
[all …]
/openbmc/linux/arch/powerpc/platforms/cell/spufs/
H A Dspu_save_dump.h_shipped7 0x20805000,
8 0x20805201,
9 0x20805402,
10 0x20805603,
11 0x20805804,
12 0x20805a05,
13 0x20805c06,
14 0x20805e07,
15 0x20806008,
16 0x20806209,
[all …]
H A Dspu_restore_dump.h_shipped7 0x40800000,
8 0x409ff801,
9 0x24000080,
10 0x24fd8081,
11 0x1cd80081,
12 0x33001180,
13 0x42034003,
14 0x33800284,
15 0x1c010204,
16 0x40200000,
[all …]
/openbmc/linux/sound/pci/mixart/
H A Dmixart_core.h15 MSG_CONNECTOR_GET_AUDIO_INFO = 0x050008,
16 MSG_CONNECTOR_GET_OUT_AUDIO_LEVEL = 0x050009,
17 MSG_CONNECTOR_SET_OUT_AUDIO_LEVEL = 0x05000A,
19 MSG_CONSOLE_MANAGER = 0x070000,
20 MSG_CONSOLE_GET_CLOCK_UID = 0x070003,
22 MSG_PHYSICALIO_SET_LEVEL = 0x0F0008,
24 MSG_STREAM_ADD_INPUT_GROUP = 0x130000,
25 MSG_STREAM_ADD_OUTPUT_GROUP = 0x130001,
26 MSG_STREAM_DELETE_GROUP = 0x130004,
27 MSG_STREAM_START_STREAM_GRP_PACKET = 0x130006,
[all …]
H A Dmixart_mixer.c24 0xc2c00000, /* [000] -96.0 dB */
25 0xc2bf0000, /* [001] -95.5 dB */
26 0xc2be0000, /* [002] -95.0 dB */
27 0xc2bd0000, /* [003] -94.5 dB */
28 0xc2bc0000, /* [004] -94.0 dB */
29 0xc2bb0000, /* [005] -93.5 dB */
30 0xc2ba0000, /* [006] -93.0 dB */
31 0xc2b90000, /* [007] -92.5 dB */
32 0xc2b80000, /* [008] -92.0 dB */
33 0xc2b70000, /* [009] -91.5 dB */
[all …]
/openbmc/linux/arch/arm/mach-sa1100/
H A Dcollie.c57 [0] = DEFINE_RES_MEM(0x40800000, SZ_4K),
86 .devs = &collie_pcmcia_scoop[0],
111 * This is GPIO 0 on the Scoop expander, which is registered
114 GPIO_LOOKUP("sharp-scoop", 0,
159 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0); in collie_uart_set_mctrl()
164 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0); in collie_uart_set_mctrl()
192 return 0; in collie_uart_probe()
213 [0] = DEFINE_RES_MEM(0x40000000, SZ_8K),
223 .id = 0,
273 .offset = 0,
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588.dtsi12 reg = <0x0 0xfd5b8000 0x0 0x10000>;
17 reg = <0x0 0xfd5c0000 0x0 0x100>;
22 reg = <0x0 0xfddc8000 0x0 0x1000>;
23 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH 0>;
33 #sound-dai-cells = <0>;
39 reg = <0x0 0xfddf4000 0x0 0x1000>;
40 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>;
50 #sound-dai-cells = <0>;
56 reg = <0x0 0xfddf8000 0x0 0x1000>;
57 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH 0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi38 #size-cells = <0>;
43 reg = <0xf00>;
51 reg = <0x40021000 0x1000>,
52 <0x40022000 0x1000>;
59 #clock-cells = <0>;
66 #clock-cells = <0>;
73 #clock-cells = <0>;
80 #clock-cells = <0>;
87 #clock-cells = <0>;
94 reg = <0x40000000 0x800000>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0>;
56 size = <0xC000000>;
57 alignment = <0x2000>;
63 reg = <0x9FF00000 0x100000>;
72 reg = <0x40021000 0x1000>,
73 <0x40022000 0x100>;
78 #size-cells = <0>;
80 ckil: clock@0 {
[all …]
/openbmc/linux/arch/m68k/mac/
H A Dmisc.c45 (offset >> 8) & 0xFF, offset & 0xFF) < 0) in cuda_pram_read_byte()
46 return 0; in cuda_pram_read_byte()
57 (offset >> 8) & 0xFF, offset & 0xFF, data) < 0) in cuda_pram_write_byte()
70 offset & 0xFF, 1) < 0) in pmu_pram_read_byte()
71 return 0; in pmu_pram_read_byte()
74 return req.reply[0]; in pmu_pram_read_byte()
82 offset & 0xFF, 1, data) < 0) in pmu_pram_write_byte()
109 data = 0; in via_rtc_recv()
110 for (i = 0 ; i < 8 ; i++) { in via_rtc_recv()
131 for (i = 0 ; i < 8 ; i++) { in via_rtc_send()
[all …]
/openbmc/linux/sound/pci/hda/
H A Dpatch_ca0132.c37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
[all …]
/openbmc/qemu/hw/m68k/
H A Dq800.c59 #define MACROM_ADDR 0x40800000
60 #define MACROM_SIZE 0x00100000
64 #define IO_BASE 0x50000000
65 #define IO_SLICE 0x00040000
67 #define IO_SIZE 0x04000000
69 #define VIA_BASE (IO_BASE + 0x00000)
70 #define SONIC_PROM_BASE (IO_BASE + 0x08000)
71 #define SONIC_BASE (IO_BASE + 0x0a000)
72 #define SCC_BASE (IO_BASE + 0x0c020)
73 #define DJMEMC_BASE (IO_BASE + 0x0e000)
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi14 reg = <0x00000000 0x04000000>,
15 <0x08000000 0x04000000>;
20 reg = <0x10210000 0x1000>;
37 reg = <0x101e2000 0x1000>;
46 reg = <0x101e3000 0x1000>;
55 reg = <0x101e4000 0x80>;
62 gpio-bank = <0>;
63 gpio-ranges = <&pinctrl 0 0 32>;
69 reg = <0x101e5000 0x80>;
77 gpio-ranges = <&pinctrl 0 32 32>;
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7.dtsi61 reg = <0x0 0x48211000 0x0 0x1000>,
62 <0x0 0x48212000 0x0 0x2000>,
63 <0x0 0x48214000 0x0 0x2000>,
64 <0x0 0x48216000 0x0 0x2000>;
73 reg = <0x0 0x48281000 0x0 0x1000>;
79 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0>;
109 opp-supported-hw = <0xFF 0x01>;
119 opp-supported-hw = <0xFF 0x02>;
[all …]
/openbmc/linux/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h37 #define PXA_CS0_PHYS 0x00000000 /* for both small and large same start */
38 #define PXA_CS1_PHYS 0x04000000 /* Small partition start address (64MB) */
39 #define PXA_CS1_LPHYS 0x30000000 /* Large partition start address (256MB) */
40 #define PXA_CS2_PHYS 0x10000000 /* (64MB) */
41 #define PXA_CS3_PHYS 0x14000000 /* (64MB) */
42 #define PXA_PCMCIA_PHYS 0x20000000 /* (256MB) */
44 #define PXA_CS0_PHYS 0x00000000
45 #define PXA_CS1_PHYS 0x04000000
46 #define PXA_CS2_PHYS 0x08000000
47 #define PXA_CS3_PHYS 0x0C000000
[all …]

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