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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dbrcm,unimac-mdio.yaml25 - brcm,asp-v2.0-mdio
78 reg = <0x403c0 0x8>, <0x40300 0x18>;
81 #size-cells = <0>;
83 ethernet-phy@0 {
85 reg = <0>;
/openbmc/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dmme1_rtr_regs.h22 #define mmMME1_RTR_HBW_RD_RQ_E_ARB 0x40100
24 #define mmMME1_RTR_HBW_RD_RQ_W_ARB 0x40104
26 #define mmMME1_RTR_HBW_RD_RQ_N_ARB 0x40108
28 #define mmMME1_RTR_HBW_RD_RQ_S_ARB 0x4010C
30 #define mmMME1_RTR_HBW_RD_RQ_L_ARB 0x40110
32 #define mmMME1_RTR_HBW_E_ARB_MAX 0x40120
34 #define mmMME1_RTR_HBW_W_ARB_MAX 0x40124
36 #define mmMME1_RTR_HBW_N_ARB_MAX 0x40128
38 #define mmMME1_RTR_HBW_S_ARB_MAX 0x4012C
40 #define mmMME1_RTR_HBW_L_ARB_MAX 0x40130
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/openbmc/linux/drivers/media/test-drivers/vivid/
H A Dvivid-core.c57 static int vid_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
61 static int vid_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
65 static int vbi_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
69 static int vbi_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
73 static int sdr_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
77 static int radio_rx_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
81 static int radio_tx_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
85 static int meta_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
89 static int meta_out_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
93 static int touch_cap_nr[VIVID_MAX_DEVS] = { [0 ... (VIVID_MAX_DEVS - 1)] = -1 };
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/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c54 * at the time it indicated completion is stored there. Returns 0 if the
66 return 0; in t4_wait_op_done_val()
68 if (--attempts == 0) in t4_wait_op_done_val()
167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()
247 log->cursor = 0; in t4_record_mbox()
249 for (i = 0; i < size / 8; i++) in t4_record_mbox()
252 entry->cmd[i++] = 0; in t4_record_mbox()
277 * The return value is 0 on success or a negative errno on failure. A
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/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "MMID", 89, 0 },
36 { "DDR", 104, 0 },
37 { "176", 176, 0 },
38 { "208", 208, 0 },
39 { "INTERRUPT", 226, 0 },
40 { "INTCLEAR", 227, 0 },
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