/openbmc/phosphor-logging/test/openpower-pels/ |
H A D | private_header_test.cpp | 39 EXPECT_EQ(ph.header().id, 0x5048); in TEST_F() 41 EXPECT_EQ(ph.header().version, 0x01); in TEST_F() 42 EXPECT_EQ(ph.header().subType, 0x02); in TEST_F() 43 EXPECT_EQ(ph.header().componentID, 0x0304); in TEST_F() 46 EXPECT_EQ(ct.yearMSB, 0x20); in TEST_F() 47 EXPECT_EQ(ct.yearLSB, 0x30); in TEST_F() 48 EXPECT_EQ(ct.month, 0x05); in TEST_F() 49 EXPECT_EQ(ct.day, 0x09); in TEST_F() 50 EXPECT_EQ(ct.hour, 0x11); in TEST_F() 51 EXPECT_EQ(ct.minutes, 0x1E); in TEST_F() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | realtek,otto-gpio.yaml | 24 pattern: "^gpio@[0-9a-f]+$" 86 reg = <0x3500 0x1c>; 98 reg = <0x3300 0x1c>, <0x3338 0x8>;
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pci/ |
H A D | g84.c | 39 return (nvkm_rd32(device, 0x00154c) & 0x1) + 1; in g84_pcie_version() 46 nvkm_mask(device, 0x00154c, 0x1, (ver >= 2 ? 0x1 : 0x0)); in g84_pcie_set_version() 53 nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0); in g84_pcie_set_cap_speed() 59 u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000; in g84_pcie_cur_speed() 61 case 0x30000: in g84_pcie_cur_speed() 63 case 0x20000: in g84_pcie_cur_speed() 65 case 0x10000: in g84_pcie_cur_speed() 74 u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300; in g84_pcie_max_speed() 75 if (reg_v == 0x2200) in g84_pcie_max_speed() 86 mask_value = 0x20; in g84_pcie_set_link_speed() [all …]
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/openbmc/u-boot/board/freescale/ls1046ardb/ |
H A D | ls1046ardb.c | 32 return 0; in board_early_init_f() 51 if (cfg_rcw_src == 0x44) in checkboard() 53 else if (cfg_rcw_src == 0x40) in checkboard() 58 printf("CPLD: V%x.%x\nPCBA: V%x.0\n", CPLD_READ(cpld_ver), in checkboard() 63 printf("SD1_CLK1 = %s, SD1_CLK2 = %s\n", freq[sd1refclk_sel], freq[0]); in checkboard() 65 return 0; in checkboard() 97 return 0; in board_init() 107 return 0; in board_setup_core_volt() 124 ret = power_mc34vr500_init(0); in power_init_board() 130 return 0; in power_init_board() [all …]
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/openbmc/u-boot/fs/ext4/ |
H A D | crc16.c | 13 /** CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1) */ 15 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, 16 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, 17 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, 18 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, 19 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, 20 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, 21 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, 22 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, 23 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, [all …]
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/openbmc/linux/lib/ |
H A D | crc16.c | 10 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */ 12 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, 13 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, 14 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, 15 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, 16 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, 17 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, 18 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, 19 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, 20 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, [all …]
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/openbmc/u-boot/fs/ubifs/ |
H A D | crc16.c | 11 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */ 13 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, 14 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, 15 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, 16 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, 17 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, 18 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, 19 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, 20 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, 21 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, [all …]
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/openbmc/u-boot/board/renesas/rsk7264/ |
H A D | lowlevel_init.S | 97 mov #0, r2 105 mov #0, r0 114 CCR1_D: .long 0x0000090B 115 FRQCR_A: .long 0xFFFE0010 116 FRQCR_D: .word 0x1003 118 STBCR3_A: .long 0xFFFE0408 119 STBCR3_D: .long 0x00000002 120 STBCR4_A: .long 0xFFFE040C 121 STBCR4_D: .word 0x0000 123 STBCR5_A: .long 0xFFFE0410 [all …]
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/openbmc/linux/drivers/mfd/ |
H A D | si476x-prop.c | 25 for (i = 0; i < size; i++) in si476x_core_element_is_in_array() 38 for (i = 0; i < size; i++) in si476x_core_element_is_in_range() 49 0x0000, in si476x_core_is_valid_property_a10() 50 0x0500, 0x0501, in si476x_core_is_valid_property_a10() 51 0x0600, in si476x_core_is_valid_property_a10() 52 0x0709, 0x070C, 0x070D, 0x70E, 0x710, in si476x_core_is_valid_property_a10() 53 0x0718, in si476x_core_is_valid_property_a10() 54 0x1207, 0x1208, in si476x_core_is_valid_property_a10() 55 0x2007, in si476x_core_is_valid_property_a10() 56 0x2300, in si476x_core_is_valid_property_a10() [all …]
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/openbmc/linux/drivers/staging/rtl8712/ |
H A D | usb_intf.c | 41 {USB_DEVICE(0x0BDA, 0x8171)}, 42 {USB_DEVICE(0x0bda, 0x8173)}, 43 {USB_DEVICE(0x0bda, 0x8712)}, 44 {USB_DEVICE(0x0bda, 0x8713)}, 45 {USB_DEVICE(0x0bda, 0xC512)}, 47 {USB_DEVICE(0x07B8, 0x8188)}, 49 {USB_DEVICE(0x0B05, 0x1786)}, 50 {USB_DEVICE(0x0B05, 0x1791)}, /* 11n mode disable */ 52 {USB_DEVICE(0x050D, 0x945A)}, 54 {USB_DEVICE(0x050D, 0x11F1)}, [all …]
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/openbmc/linux/drivers/staging/wlan-ng/ |
H A D | prism2usb.c | 13 PRISM_DEV(0x04bb, 0x0922, "IOData AirPort WN-B11/USBS"), 14 PRISM_DEV(0x07aa, 0x0012, "Corega USB Wireless LAN Stick-11"), 15 PRISM_DEV(0x09aa, 0x3642, "Prism2.x 11Mbps USB WLAN Adapter"), 16 PRISM_DEV(0x1668, 0x0408, "Actiontec Prism2.5 11Mbps USB WLAN Adapter"), 17 PRISM_DEV(0x1668, 0x0421, "Actiontec Prism2.5 11Mbps USB WLAN Adapter"), 18 PRISM_DEV(0x1915, 0x2236, "Linksys WUSB11v3.0 11Mbps USB WLAN Adapter"), 19 PRISM_DEV(0x066b, 0x2212, "Linksys WUSB11v2.5 11Mbps USB WLAN Adapter"), 20 PRISM_DEV(0x066b, 0x2213, "Linksys WUSB12v1.1 11Mbps USB WLAN Adapter"), 21 PRISM_DEV(0x0411, 0x0016, "Melco WLI-USB-S11 11Mbps WLAN Adapter"), 22 PRISM_DEV(0x08de, 0x7a01, "PRISM25 USB IEEE 802.11 Mini Adapter"), [all …]
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/openbmc/u-boot/examples/standalone/ |
H A D | smc91111_eeprom.c | 22 #define EEPROM 0x1 23 #define MAC 0x2 24 #define UNKNOWN 0x4 49 return (0); in smc91111_eeprom() 54 if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) { in smc91111_eeprom() 56 return (0); in smc91111_eeprom() 59 done = 0; in smc91111_eeprom() 65 line = 0; in smc91111_eeprom() 66 i = 0; in smc91111_eeprom() 81 input[i] = 0; in smc91111_eeprom() [all …]
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/openbmc/linux/drivers/gpu/drm/mediatek/ |
H A D | mtk_dp_reg.h | 9 #define SEC_OFFSET 0x4000 15 /* offset: 0x0 */ 16 #define DP_PHY_GLB_BIAS_GEN_00 0x0 18 #define DP_PHY_GLB_DPAUX_TX 0x8 20 #define MTK_DP_0034 0x34 36 #define DA_XTP_GLB_LDO_EN_FORCE_EN BIT(0) 37 #define DP_PHY_LANE_TX_0 0x104 40 #define DP_PHY_LANE_TX_1 0x204 43 #define DP_PHY_LANE_TX_2 0x304 46 #define DP_PHY_LANE_TX_3 0x404 [all …]
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/openbmc/linux/drivers/media/dvb-frontends/ |
H A D | s5h1411.c | 42 } while (0) 50 { S5H1411_I2C_TOP_ADDR, 0x00, 0x0071, }, 51 { S5H1411_I2C_TOP_ADDR, 0x08, 0x0047, }, 52 { S5H1411_I2C_TOP_ADDR, 0x1c, 0x0400, }, 53 { S5H1411_I2C_TOP_ADDR, 0x1e, 0x0370, }, 54 { S5H1411_I2C_TOP_ADDR, 0x1f, 0x342c, }, 55 { S5H1411_I2C_TOP_ADDR, 0x24, 0x0231, }, 56 { S5H1411_I2C_TOP_ADDR, 0x25, 0x1011, }, 57 { S5H1411_I2C_TOP_ADDR, 0x26, 0x0f07, }, 58 { S5H1411_I2C_TOP_ADDR, 0x27, 0x0f04, }, [all …]
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/openbmc/linux/drivers/bus/ |
H A D | omap_l3_noc.h | 16 #define CUSTOM_ERROR 0x2 17 #define STANDARD_ERROR 0x0 18 #define INBAND_ERROR 0x0 19 #define L3_APPLICATION_ERROR 0x0 20 #define L3_DEBUG_ERROR 0x1 23 #define L3_TARG_STDERRLOG_MAIN 0x48 24 #define L3_TARG_STDERRLOG_HDR 0x4c 25 #define L3_TARG_STDERRLOG_MSTADDR 0x50 26 #define L3_TARG_STDERRLOG_INFO 0x58 27 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c [all …]
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/openbmc/linux/drivers/hwmon/ |
H A D | jc42.c | 27 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END }; 30 #define JC42_REG_CAP 0x00 31 #define JC42_REG_CONFIG 0x01 32 #define JC42_REG_TEMP_UPPER 0x02 33 #define JC42_REG_TEMP_LOWER 0x03 34 #define JC42_REG_TEMP_CRITICAL 0x04 35 #define JC42_REG_TEMP 0x05 36 #define JC42_REG_MANID 0x06 37 #define JC42_REG_DEVICEID 0x07 38 #define JC42_REG_SMBUS 0x22 /* NXP and Atmel, possibly others? */ [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
H A D | ramgt215.c | 103 u8 median[8], bins[4] = {0, 0, 0, 0}, bin = 0, qty = 0; in gt215_link_train_calc() 105 for (i = 0; i < 8; i++) { in gt215_link_train_calc() 106 for (lo = 0; lo < 0x40; lo++) { in gt215_link_train_calc() 107 if (!(vals[lo] & 0x80000000)) in gt215_link_train_calc() 109 if (vals[lo] & (0x101 << i)) in gt215_link_train_calc() 113 if (lo == 0x40) in gt215_link_train_calc() 116 for (hi = lo + 1; hi < 0x40; hi++) { in gt215_link_train_calc() 117 if (!(vals[lo] & 0x80000000)) in gt215_link_train_calc() 119 if (!(vals[hi] & (0x101 << i))) { in gt215_link_train_calc() 126 bins[(median[i] & 0xf0) >> 4]++; in gt215_link_train_calc() [all …]
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/openbmc/linux/drivers/net/ethernet/amd/ |
H A D | ariadne.h | 17 * Publication #16907, Rev. B, Amendment/0, May 1994 62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */ 63 #define CSR1 0x0100 /* - IADR[15:0] */ 64 #define CSR2 0x0200 /* - IADR[23:16] */ 65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */ 66 #define CSR4 0x0400 /* - Test and Features Control */ 67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */ 68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */ 69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */ 70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */ [all …]
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/openbmc/linux/drivers/media/usb/pwc/ |
H A D | pwc-ctrl.c | 41 #define GET_STATUS_B00 0x0B00 42 #define SENSOR_TYPE_FORMATTER1 0x0C00 43 #define GET_STATUS_3000 0x3000 44 #define READ_RAW_Y_MEAN_FORMATTER 0x3100 45 #define SET_POWER_SAVE_MODE_FORMATTER 0x3200 46 #define MIRROR_IMAGE_FORMATTER 0x3300 47 #define LED_FORMATTER 0x3400 48 #define LOWLIGHT 0x3500 49 #define GET_STATUS_3600 0x3600 50 #define SENSOR_TYPE_FORMATTER2 0x3700 [all …]
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/openbmc/linux/sound/soc/sh/rcar/ |
H A D | src.c | 50 for ((i) = 0; \ 68 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_activation() 75 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_halt() 97 return 0; in rsnd_src_convert_rate() 119 unsigned int rate = 0; in rsnd_src_get_rate() 147 0x01800000, /* 6 - 1/6 */ 148 0x01000000, /* 6 - 1/4 */ 149 0x00c00000, /* 6 - 1/3 */ 150 0x00800000, /* 6 - 1/2 */ 151 0x00600000, /* 6 - 2/3 */ [all …]
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/openbmc/linux/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mt7629.c | 12 MTK_PIN(_number, _name, 0, _eint_n, DRV_GRP1) 15 PIN_FIELD(0, 78, 0x300, 0x10, 0, 4), 19 PIN_FIELD(0, 78, 0x0, 0x10, 0, 1), 23 PIN_FIELD(0, 78, 0x200, 0x10, 0, 1), 27 PIN_FIELD(0, 78, 0x100, 0x10, 0, 1), 31 PIN_FIELD(0, 10, 0x1000, 0x10, 0, 1), 32 PIN_FIELD(11, 18, 0x2000, 0x10, 0, 1), 33 PIN_FIELD(19, 32, 0x3000, 0x10, 0, 1), 34 PIN_FIELD(33, 48, 0x4000, 0x10, 0, 1), 35 PIN_FIELD(49, 50, 0x5000, 0x10, 0, 1), [all …]
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/openbmc/linux/drivers/net/ethernet/smsc/ |
H A D | smc91x.c | 15 * nowait = 0 for normal wait states, 1 eliminates additional wait states 52 #define SMC_DEBUG 0 88 # define SMC_NOWAIT 0 136 #define THROTTLE_TX_PKTS 0 148 } while (0) 152 if (SMC_DEBUG > 0) \ 156 } while (0) 168 for (i = 0; i < lines ; i ++) { in PRINT_PKT() 171 for (cur = 0; cur < 8; cur++) { in PRINT_PKT() 180 for (i = 0; i < remainder/2 ; i++) { in PRINT_PKT() [all …]
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H A D | smc9194.c | 17 . ifport = 0 for autodetect, 1 for TP, 2 for AUI ( or 10base2 ) 110 {.port = 0x200, .irq = 0}, 111 {.port = 0x220, .irq = 0}, 112 {.port = 0x240, .irq = 0}, 113 {.port = 0x260, .irq = 0}, 114 {.port = 0x280, .irq = 0}, 115 {.port = 0x2A0, .irq = 0}, 116 {.port = 0x2C0, .irq = 0}, 117 {.port = 0x2E0, .irq = 0}, 118 {.port = 0x300, .irq = 0}, [all …]
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/openbmc/linux/drivers/soc/fsl/qbman/ |
H A D | bman.c | 40 #define BM_REG_RCR_PI_CINH 0x3000 41 #define BM_REG_RCR_CI_CINH 0x3100 42 #define BM_REG_RCR_ITR 0x3200 43 #define BM_REG_CFG 0x3300 44 #define BM_REG_SCN(n) (0x3400 + ((n) << 6)) 45 #define BM_REG_ISR 0x3e00 46 #define BM_REG_IER 0x3e40 47 #define BM_REG_ISDR 0x3e80 48 #define BM_REG_IIR 0x3ec0 51 #define BM_CL_CR 0x0000 [all …]
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H A D | qman.c | 40 #define QMAN_ITP_MAX 0xFFF 48 #define QM_REG_EQCR_PI_CINH 0x3000 49 #define QM_REG_EQCR_CI_CINH 0x3040 50 #define QM_REG_EQCR_ITR 0x3080 51 #define QM_REG_DQRR_PI_CINH 0x3100 52 #define QM_REG_DQRR_CI_CINH 0x3140 53 #define QM_REG_DQRR_ITR 0x3180 54 #define QM_REG_DQRR_DCAP 0x31C0 55 #define QM_REG_DQRR_SDQCR 0x3200 56 #define QM_REG_DQRR_VDQCR 0x3240 [all …]
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